[ARM] 4311/1: ixp4xx: add KIXRP435 platform

Add Intel KIXRP435 Reference Platform based on IXP43x processor.
Fixed after review : access to cp15 removed in identification functions,
used access to global processor_id instead

Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: Ruslan  Sushko <rsushko@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

5 files changed, 36 insertions, 7 deletions

diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 8a339cdfe222..dd0fb7239a80 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -62,6 +62,12 @@ config MACH_IXDP465
           IXDP465 Development Platform (Also known as BMP).
           For more information on this platform, see <file:Documentation/arm/IXP4xx>.
 
+config MACH_KIXRP435
+        bool "KIXRP435"
+        help
+          Say 'Y' here if you want your kernel to support Intel's
+          KIXRP435 Reference Platform.
+          For more information on this platform, see <file:Documentation/arm/IXP4xx>.
 
 #
 # IXCDP1100 is the exact same HW as IXDP425, but with a different machine 
@@ -94,7 +100,7 @@ config MACH_NAS100D
 #
 config  ARCH_IXDP4XX
         bool
-        depends on ARCH_IXDP425 || MACH_IXDP465
+        depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
         default y
 
 #
@@ -105,6 +111,11 @@ config CPU_IXP46X
         depends on MACH_IXDP465
         default y
 
+config CPU_IXP43X
+        bool
+        depends on MACH_KIXRP435
+        default y
+
 config MACH_GTWX5715
         bool "Gemtek WX5715 (Linksys WRV54G)"
         depends on ARCH_IXP4XX
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 9562177b5fe1..bf04121d1a31 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -374,7 +374,7 @@ void __init ixp4xx_pci_preinit(void)
          * Determine which PCI read method to use.
          * Rev 0 IXP425 requires workaround.
          */
-        if (!(processor_id & 0xf) && !cpu_is_ixp46x()) {
+        if (!(processor_id & 0xf) && cpu_is_ixp42x()) {
                 printk("PCI: IXP42x A0 silicon detected - "
                         "PCI Non-Prefetch Workaround Enabled\n");
                 ixp4xx_pci_read = ixp4xx_pci_read_errata;
@@ -480,7 +480,7 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
         res[0].flags = IORESOURCE_IO;
 
         res[1].name = "PCI Memory Space";
-        res[1].start = 0x48000000;
+        res[1].start = PCIBIOS_MIN_MEM;
 #ifndef CONFIG_IXP4XX_INDIRECT_PCI
         res[1].end = 0x4bffffff;
 #else
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 39f2eeb219b4..030dd75d053a 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -192,7 +192,7 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
 
 static void ixp4xx_irq_mask(unsigned int irq)
 {
-        if (cpu_is_ixp46x() && irq >= 32)
+        if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
                 *IXP4XX_ICMR2 &= ~(1 << (irq - 32));
         else
                 *IXP4XX_ICMR &= ~(1 << irq);
@@ -215,7 +215,7 @@ static void ixp4xx_irq_unmask(unsigned int irq)
         if (!(ixp4xx_irq_edge & (1 << irq)))
                 ixp4xx_irq_ack(irq);
 
-        if (cpu_is_ixp46x() && irq >= 32)
+        if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
                 *IXP4XX_ICMR2 |= (1 << (irq - 32));
         else
                 *IXP4XX_ICMR |= (1 << irq);
@@ -239,7 +239,7 @@ void __init ixp4xx_init_irq(void)
         /* Disable all interrupt */
         *IXP4XX_ICMR = 0x0; 
 
-        if (cpu_is_ixp46x()) {
+        if (cpu_is_ixp46x() || cpu_is_ixp43x()) {
                 /* Route upper 32 sources to IRQ instead of FIQ */
                 *IXP4XX_ICLR2 = 0x00;
 
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index 99c1dc8033c8..408796004812 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -66,7 +66,7 @@ struct hw_pci ixdp425_pci __initdata = {
 int __init ixdp425_pci_init(void)
 {
         if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
-                        machine_is_ixdp465())
+                        machine_is_ixdp465() || machine_is_kixrp435())
                 pci_common_init(&ixdp425_pci);
         return 0;
 }
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 04b1d56396a0..ec4f07950ec6 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -115,6 +115,11 @@ static void __init ixdp425_init(void)
         ixdp425_flash_resource.end =
                 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
 
+        if (cpu_is_ixp43x()) {
+                ixdp425_uart.num_resources = 1;
+                ixdp425_uart_data[1].flags = 0;
+        }
+
         platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
 }
 
@@ -156,3 +161,16 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
         .init_machine   = ixdp425_init,
 MACHINE_END
 #endif
+
+#ifdef CONFIG_MACH_KIXRP435
+MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
+        /* Maintainer: MontaVista Software, Inc. */
+        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
+        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
+        .map_io         = ixp4xx_map_io,
+        .init_irq       = ixp4xx_init_irq,
+        .timer          = &ixp4xx_timer,
+        .boot_params    = 0x0100,
+        .init_machine   = ixdp425_init,
+MACHINE_END
+#endif