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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-12-17 18:22:27 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-12-17 18:22:27 -0500
commit376bddd34433065aeb9b9a140870537feecf90ef (patch)
treea40e2b84ad89f4b3ba968de65a4bf7ff6ccae835 /arch/arm/mach-ixp4xx
parentd526e85f60fce9aa2a1432cbd06e3cf20c1644c8 (diff)
parent667b504a2c411e4d5915a6e2260a3857ba9f797a (diff)
Merge remote-tracking branch 'agust/next' into next
Brings some 52xx updates. Also manually merged tools/perf/perf.h. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c1
-rw-r--r--arch/arm/mach-ixp4xx/common.c13
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h46
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/qmgr.h12
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_npe.c9
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c12
8 files changed, 44 insertions, 56 deletions
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 1694f01ce2b6..6d6bde3e15fa 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -410,6 +410,7 @@ void __init ixp4xx_pci_preinit(void)
410 * Enable the IO window to be way up high, at 0xfffffc00 410 * Enable the IO window to be way up high, at 0xfffffc00
411 */ 411 */
412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01); 412 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);
413 local_write_config(0x40, 4, 0x000080FF); /* No TRDY time limit */
413 } else { 414 } else {
414 printk("PCI: IXP4xx is target - No bus scan performed\n"); 415 printk("PCI: IXP4xx is target - No bus scan performed\n");
415 } 416 }
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fdf91a160884..8c0c0e2d0727 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -67,15 +67,12 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS), 67 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
68 .length = IXP4XX_PCI_CFG_REGION_SIZE, 68 .length = IXP4XX_PCI_CFG_REGION_SIZE,
69 .type = MT_DEVICE 69 .type = MT_DEVICE
70 }, 70 }, { /* Queue Manager */
71#ifdef CONFIG_DEBUG_LL 71 .virtual = (unsigned long)IXP4XX_QMGR_BASE_VIRT,
72 { /* Debug UART mapping */ 72 .pfn = __phys_to_pfn(IXP4XX_QMGR_BASE_PHYS),
73 .virtual = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT, 73 .length = IXP4XX_QMGR_REGION_SIZE,
74 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
75 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
76 .type = MT_DEVICE 74 .type = MT_DEVICE
77 } 75 },
78#endif
79}; 76};
80 77
81void __init ixp4xx_map_io(void) 78void __init ixp4xx_map_io(void)
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index b800a031207c..53b8348dfcc2 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -15,6 +15,7 @@
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/flash.h> 16#include <asm/mach/flash.h>
17#include <asm/mach/pci.h> 17#include <asm/mach/pci.h>
18#include <asm/system_info.h>
18 19
19#define SLOT_ETHA 0x0B /* IDSEL = AD21 */ 20#define SLOT_ETHA 0x0B /* IDSEL = AD21 */
20#define SLOT_ETHB 0x0C /* IDSEL = AD20 */ 21#define SLOT_ETHB 0x0C /* IDSEL = AD20 */
@@ -329,7 +330,7 @@ static struct platform_device device_hss_tab[] = {
329}; 330};
330 331
331 332
332static struct platform_device *device_tab[6] __initdata = { 333static struct platform_device *device_tab[7] __initdata = {
333 &device_flash, /* index 0 */ 334 &device_flash, /* index 0 */
334}; 335};
335 336
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index 8c9f8d564492..ff686cbc5df4 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
17#else 17#else
18 mov \rp, #0 18 mov \rp, #0
19#endif 19#endif
20 orr \rv, \rp, #0xff000000 @ virtual 20 orr \rv, \rp, #0xfe000000 @ virtual
21 orr \rv, \rv, #0x00b00000 21 orr \rv, \rv, #0x00f00000
22 orr \rp, \rp, #0xc8000000 @ physical 22 orr \rp, \rp, #0xc8000000 @ physical
23 .endm 23 .endm
24 24
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index eb68b61ce975..c5bae9c035d5 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -30,51 +30,43 @@
30 * 30 *
31 * 0x50000000 0x10000000 ioremap'd EXP BUS 31 * 0x50000000 0x10000000 ioremap'd EXP BUS
32 * 32 *
33 * 0x6000000 0x00004000 ioremap'd QMgr 33 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
34 * 34 *
35 * 0xC0000000 0x00001000 0xffbff000 PCI CFG 35 * 0xC0000000 0x00001000 0xFEF13000 PCI CFG
36 * 36 *
37 * 0xC4000000 0x00001000 0xffbfe000 EXP CFG 37 * 0xC4000000 0x00001000 0xFEF14000 EXP CFG
38 * 38 *
39 * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals 39 * 0x60000000 0x00004000 0xFEF15000 QMgr
40 */ 40 */
41 41
42/* 42/*
43 * Queue Manager 43 * Queue Manager
44 */ 44 */
45#define IXP4XX_QMGR_BASE_PHYS (0x60000000) 45#define IXP4XX_QMGR_BASE_PHYS 0x60000000
46#define IXP4XX_QMGR_REGION_SIZE (0x00004000) 46#define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFEF15000)
47#define IXP4XX_QMGR_REGION_SIZE 0x00004000
47 48
48/* 49/*
49 * Expansion BUS Configuration registers 50 * Peripheral space, including debug UART. Must be section-aligned so that
51 * it can be used with the low-level debug code.
50 */ 52 */
51#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 53#define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000
52#define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000) 54#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000)
53#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 55#define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000
54 56
55/* 57/*
56 * PCI Config registers 58 * PCI Config registers
57 */ 59 */
58#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 60#define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000
59#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000) 61#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000)
60#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 62#define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000
61
62/*
63 * Peripheral space
64 */
65#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
66#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000)
67#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
68 63
69/* 64/*
70 * Debug UART 65 * Expansion BUS Configuration registers
71 *
72 * This is basically a remap of UART1 into a region that is section
73 * aligned so that it * can be used with the low-level debug code.
74 */ 66 */
75#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) 67#define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000
76#define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000) 68#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000
77#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) 69#define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000
78 70
79#define IXP4XX_EXP_CS0_OFFSET 0x00 71#define IXP4XX_EXP_CS0_OFFSET 0x00
80#define IXP4XX_EXP_CS1_OFFSET 0x04 72#define IXP4XX_EXP_CS1_OFFSET 0x04
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 9e7cad2d54cb..4de8da536dbb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);
86 86
87static inline void qmgr_put_entry(unsigned int queue, u32 val) 87static inline void qmgr_put_entry(unsigned int queue, u32 val)
88{ 88{
89 extern struct qmgr_regs __iomem *qmgr_regs; 89 struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
90#if DEBUG_QMGR 90#if DEBUG_QMGR
91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
92 92
@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
99static inline u32 qmgr_get_entry(unsigned int queue) 99static inline u32 qmgr_get_entry(unsigned int queue)
100{ 100{
101 u32 val; 101 u32 val;
102 extern struct qmgr_regs __iomem *qmgr_regs; 102 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
103 val = __raw_readl(&qmgr_regs->acc[queue][0]); 103 val = __raw_readl(&qmgr_regs->acc[queue][0]);
104#if DEBUG_QMGR 104#if DEBUG_QMGR
105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ 105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)
112 112
113static inline int __qmgr_get_stat1(unsigned int queue) 113static inline int __qmgr_get_stat1(unsigned int queue)
114{ 114{
115 extern struct qmgr_regs __iomem *qmgr_regs; 115 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) 116 return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
117 >> ((queue & 7) << 2)) & 0xF; 117 >> ((queue & 7) << 2)) & 0xF;
118} 118}
119 119
120static inline int __qmgr_get_stat2(unsigned int queue) 120static inline int __qmgr_get_stat2(unsigned int queue)
121{ 121{
122 extern struct qmgr_regs __iomem *qmgr_regs; 122 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
123 BUG_ON(queue >= HALF_QUEUES); 123 BUG_ON(queue >= HALF_QUEUES);
124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) 124 return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
125 >> ((queue & 0xF) << 1)) & 0x3; 125 >> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
145 */ 145 */
146static inline int qmgr_stat_below_low_watermark(unsigned int queue) 146static inline int qmgr_stat_below_low_watermark(unsigned int queue)
147{ 147{
148 extern struct qmgr_regs __iomem *qmgr_regs; 148 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
149 if (queue >= HALF_QUEUES) 149 if (queue >= HALF_QUEUES)
150 return (__raw_readl(&qmgr_regs->statne_h) >> 150 return (__raw_readl(&qmgr_regs->statne_h) >>
151 (queue - HALF_QUEUES)) & 0x01; 151 (queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
172 */ 172 */
173static inline int qmgr_stat_full(unsigned int queue) 173static inline int qmgr_stat_full(unsigned int queue)
174{ 174{
175 extern struct qmgr_regs __iomem *qmgr_regs; 175 const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
176 if (queue >= HALF_QUEUES) 176 if (queue >= HALF_QUEUES)
177 return (__raw_readl(&qmgr_regs->statf_h) >> 177 return (__raw_readl(&qmgr_regs->statf_h) >>
178 (queue - HALF_QUEUES)) & 0x01; 178 (queue - HALF_QUEUES)) & 0x01;
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index a17ed79207a4..d4eb09a62863 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -116,7 +116,11 @@
116/* NPE mailbox_status value for reset */ 116/* NPE mailbox_status value for reset */
117#define RESET_MBOX_STAT 0x0000F0F0 117#define RESET_MBOX_STAT 0x0000F0F0
118 118
119const char *npe_names[] = { "NPE-A", "NPE-B", "NPE-C" }; 119#define NPE_A_FIRMWARE "NPE-A"
120#define NPE_B_FIRMWARE "NPE-B"
121#define NPE_C_FIRMWARE "NPE-C"
122
123const char *npe_names[] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE };
120 124
121#define print_npe(pri, npe, fmt, ...) \ 125#define print_npe(pri, npe, fmt, ...) \
122 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__) 126 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
@@ -724,6 +728,9 @@ module_exit(npe_cleanup_module);
724 728
725MODULE_AUTHOR("Krzysztof Halasa"); 729MODULE_AUTHOR("Krzysztof Halasa");
726MODULE_LICENSE("GPL v2"); 730MODULE_LICENSE("GPL v2");
731MODULE_FIRMWARE(NPE_A_FIRMWARE);
732MODULE_FIRMWARE(NPE_B_FIRMWARE);
733MODULE_FIRMWARE(NPE_C_FIRMWARE);
727 734
728EXPORT_SYMBOL(npe_names); 735EXPORT_SYMBOL(npe_names);
729EXPORT_SYMBOL(npe_running); 736EXPORT_SYMBOL(npe_running);
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index 852f7c9f87d0..9d1b6b7c394c 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -14,7 +14,7 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <mach/qmgr.h> 15#include <mach/qmgr.h>
16 16
17struct qmgr_regs __iomem *qmgr_regs; 17static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
18static struct resource *mem_res; 18static struct resource *mem_res;
19static spinlock_t qmgr_lock; 19static spinlock_t qmgr_lock;
20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */ 20static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
@@ -293,12 +293,6 @@ static int qmgr_init(void)
293 if (mem_res == NULL) 293 if (mem_res == NULL)
294 return -EBUSY; 294 return -EBUSY;
295 295
296 qmgr_regs = ioremap(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
297 if (qmgr_regs == NULL) {
298 err = -ENOMEM;
299 goto error_map;
300 }
301
302 /* reset qmgr registers */ 296 /* reset qmgr registers */
303 for (i = 0; i < 4; i++) { 297 for (i = 0; i < 4; i++) {
304 __raw_writel(0x33333333, &qmgr_regs->stat1[i]); 298 __raw_writel(0x33333333, &qmgr_regs->stat1[i]);
@@ -347,8 +341,6 @@ static int qmgr_init(void)
347error_irq2: 341error_irq2:
348 free_irq(IRQ_IXP4XX_QM1, NULL); 342 free_irq(IRQ_IXP4XX_QM1, NULL);
349error_irq: 343error_irq:
350 iounmap(qmgr_regs);
351error_map:
352 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 344 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
353 return err; 345 return err;
354} 346}
@@ -359,7 +351,6 @@ static void qmgr_remove(void)
359 free_irq(IRQ_IXP4XX_QM2, NULL); 351 free_irq(IRQ_IXP4XX_QM2, NULL);
360 synchronize_irq(IRQ_IXP4XX_QM1); 352 synchronize_irq(IRQ_IXP4XX_QM1);
361 synchronize_irq(IRQ_IXP4XX_QM2); 353 synchronize_irq(IRQ_IXP4XX_QM2);
362 iounmap(qmgr_regs);
363 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE); 354 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
364} 355}
365 356
@@ -369,7 +360,6 @@ module_exit(qmgr_remove);
369MODULE_LICENSE("GPL v2"); 360MODULE_LICENSE("GPL v2");
370MODULE_AUTHOR("Krzysztof Halasa"); 361MODULE_AUTHOR("Krzysztof Halasa");
371 362
372EXPORT_SYMBOL(qmgr_regs);
373EXPORT_SYMBOL(qmgr_set_irq); 363EXPORT_SYMBOL(qmgr_set_irq);
374EXPORT_SYMBOL(qmgr_enable_irq); 364EXPORT_SYMBOL(qmgr_enable_irq);
375EXPORT_SYMBOL(qmgr_disable_irq); 365EXPORT_SYMBOL(qmgr_disable_irq);