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authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-07 18:40:39 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-07 18:40:39 -0500
commitea14fad0d416354a4e9bb1a04f32acba706f9548 (patch)
tree2c8acc5331f189aef1d40ddce3f40d6be9314e77 /arch/arm/mach-ixp4xx
parent6ee7e78e7c78d871409ad4df30551c9355be7d0e (diff)
parent6705cda24fad1cb0ac82ac4f312df8ec735b39b0 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (76 commits) [ARM] 4002/1: S3C24XX: leave parent IRQs unmasked [ARM] 4001/1: S3C24XX: shorten reboot time [ARM] 3983/2: remove unused argument to __bug() [ARM] 4000/1: Osiris: add third serial port in [ARM] 3999/1: RX3715: suspend to RAM support [ARM] 3998/1: VR1000: LED platform devices [ARM] 3995/1: iop13xx: add iop13xx support [ARM] 3968/1: iop13xx: add iop13xx_defconfig [ARM] Update mach-types [ARM] Allow gcc to optimise arm_add_memory a little more [ARM] 3991/1: i.MX/MX1 high resolution time source [ARM] 3990/1: i.MX/MX1 more precise PLL decode [ARM] 3986/1: H1940: suspend to RAM support [ARM] 3985/1: ixp4xx clocksource cleanup [ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2) [ARM] 3994/1: ixp23xx: fix handling of pci master aborts [ARM] 3981/1: sched_clock for PXA2xx [ARM] 3980/1: extend the ARM Versatile sched_clock implementation from 32 to 63 bit [ARM] 3979/1: extend the SA11x0 sched_clock implementation from 32 to 63 bit period [ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counter ...
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/common.c51
1 files changed, 47 insertions, 4 deletions
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fbe288a8da65..2ec9a9e9a04d 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -28,6 +28,7 @@
28#include <linux/timex.h> 28#include <linux/timex.h>
29#include <linux/clocksource.h> 29#include <linux/clocksource.h>
30 30
31#include <asm/arch/udc.h>
31#include <asm/hardware.h> 32#include <asm/hardware.h>
32#include <asm/uaccess.h> 33#include <asm/uaccess.h>
33#include <asm/io.h> 34#include <asm/io.h>
@@ -39,6 +40,8 @@
39#include <asm/mach/irq.h> 40#include <asm/mach/irq.h>
40#include <asm/mach/time.h> 41#include <asm/mach/time.h>
41 42
43static int __init ixp4xx_clocksource_init(void);
44
42/************************************************************************* 45/*************************************************************************
43 * IXP4xx chipset I/O mapping 46 * IXP4xx chipset I/O mapping
44 *************************************************************************/ 47 *************************************************************************/
@@ -195,7 +198,7 @@ static void ixp4xx_irq_unmask(unsigned int irq)
195 *IXP4XX_ICMR |= (1 << irq); 198 *IXP4XX_ICMR |= (1 << irq);
196} 199}
197 200
198static struct irqchip ixp4xx_irq_chip = { 201static struct irq_chip ixp4xx_irq_chip = {
199 .name = "IXP4xx", 202 .name = "IXP4xx",
200 .ack = ixp4xx_irq_ack, 203 .ack = ixp4xx_irq_ack,
201 .mask = ixp4xx_irq_mask, 204 .mask = ixp4xx_irq_mask,
@@ -224,7 +227,7 @@ void __init ixp4xx_init_irq(void)
224 /* Default to all level triggered */ 227 /* Default to all level triggered */
225 for(i = 0; i < NR_IRQS; i++) { 228 for(i = 0; i < NR_IRQS; i++) {
226 set_irq_chip(i, &ixp4xx_irq_chip); 229 set_irq_chip(i, &ixp4xx_irq_chip);
227 set_irq_handler(i, do_level_IRQ); 230 set_irq_handler(i, handle_level_irq);
228 set_irq_flags(i, IRQF_VALID); 231 set_irq_flags(i, IRQF_VALID);
229 } 232 }
230} 233}
@@ -280,12 +283,52 @@ static void __init ixp4xx_timer_init(void)
280 283
281 /* Connect the interrupt handler and enable the interrupt */ 284 /* Connect the interrupt handler and enable the interrupt */
282 setup_irq(IRQ_IXP4XX_TIMER1, &ixp4xx_timer_irq); 285 setup_irq(IRQ_IXP4XX_TIMER1, &ixp4xx_timer_irq);
286
287 ixp4xx_clocksource_init();
283} 288}
284 289
285struct sys_timer ixp4xx_timer = { 290struct sys_timer ixp4xx_timer = {
286 .init = ixp4xx_timer_init, 291 .init = ixp4xx_timer_init,
287}; 292};
288 293
294static struct pxa2xx_udc_mach_info ixp4xx_udc_info;
295
296void __init ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info)
297{
298 memcpy(&ixp4xx_udc_info, info, sizeof *info);
299}
300
301static struct resource ixp4xx_udc_resources[] = {
302 [0] = {
303 .start = 0xc800b000,
304 .end = 0xc800bfff,
305 .flags = IORESOURCE_MEM,
306 },
307 [1] = {
308 .start = IRQ_IXP4XX_USB,
309 .end = IRQ_IXP4XX_USB,
310 .flags = IORESOURCE_IRQ,
311 },
312};
313
314/*
315 * USB device controller. The IXP4xx uses the same controller as PXA2XX,
316 * so we just use the same device.
317 */
318static struct platform_device ixp4xx_udc_device = {
319 .name = "pxa2xx-udc",
320 .id = -1,
321 .num_resources = 2,
322 .resource = ixp4xx_udc_resources,
323 .dev = {
324 .platform_data = &ixp4xx_udc_info,
325 },
326};
327
328static struct platform_device *ixp4xx_devices[] __initdata = {
329 &ixp4xx_udc_device,
330};
331
289static struct resource ixp46x_i2c_resources[] = { 332static struct resource ixp46x_i2c_resources[] = {
290 [0] = { 333 [0] = {
291 .start = 0xc8011000, 334 .start = 0xc8011000,
@@ -321,6 +364,8 @@ void __init ixp4xx_sys_init(void)
321{ 364{
322 ixp4xx_exp_bus_size = SZ_16M; 365 ixp4xx_exp_bus_size = SZ_16M;
323 366
367 platform_add_devices(ixp4xx_devices, ARRAY_SIZE(ixp4xx_devices));
368
324 if (cpu_is_ixp46x()) { 369 if (cpu_is_ixp46x()) {
325 int region; 370 int region;
326 371
@@ -363,5 +408,3 @@ static int __init ixp4xx_clocksource_init(void)
363 408
364 return 0; 409 return 0;
365} 410}
366
367device_initcall(ixp4xx_clocksource_init);