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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-21 19:01:50 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-21 19:01:50 -0400
commitff8ce5f67ddca709fe59e6173f89260f0fdc2b22 (patch)
tree90d3ad380b290d251b54590be485b2ffb4528e5a /arch/arm/mach-ixp4xx
parent4f6ade91532b5b05ea28219b891f12a3cec528cd (diff)
parent4ab1056766a4e49f6b9ef324313dd1583f8f8f4e (diff)
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull core ARM updates from Russell King: "This is the bulk of the core ARM updates for this merge window. Included in here is a different way to handle the VIVT cache flushing on context switch, which should allow scheduler folk to remove a special case in their core code. We have architectured timer support here, which is a set of timers specified by the ARM architecture for future SoCs. So we should see less variability in timer design going forward. The last big thing here is my cleanup to the way we handle PCI across ARM, fixing some oddities in some platforms which hadn't realised there was a way to deal with their private data already built in to our PCI backend. I've also removed support for the ARMv3 architecture; it hasn't worked properly for years so it seems pointless to keep it around." * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (47 commits) ARM: PCI: remove per-pci_hw list of buses ARM: PCI: dove/kirkwood/mv78xx0: use sys->private_data ARM: PCI: provide a default bus scan implementation ARM: PCI: get rid of pci_std_swizzle() ARM: PCI: versatile: fix PCI interrupt setup ARM: PCI: integrator: use common PCI swizzle ARM: 7416/1: LPAE: Remove unused L_PTE_(BUFFERABLE|CACHEABLE) macros ARM: 7415/1: vfp: convert printk's to pr_*'s ARM: decompressor: avoid speculative prefetch from non-RAM areas ARM: Remove ARMv3 support from decompressor ARM: 7413/1: move read_{boot,persistent}_clock to the architecture level ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs ARM: 7363/1: DEBUG_LL: limit early mapping to the minimum ARM: 7391/1: versatile: add some auxdata for device trees ARM: 7389/2: plat-versatile: modernize FPGA IRQ controller AMBA: get rid of last two uses of NO_IRQ ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held ARM: 7404/1: cmpxchg64: use atomic64 and local64 routines for cmpxchg64 ARM: 7347/1: SCU: use cpu_logical_map for per-CPU low power mode ...
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/avila-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/fsg-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/gateway7001-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c3
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/platform.h2
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/miccpt-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/vulcan-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/wg302v2-pci.c3
16 files changed, 15 insertions, 35 deletions
diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c
index 8fea0a3c5246..548c7d43ade6 100644
--- a/arch/arm/mach-ixp4xx/avila-pci.c
+++ b/arch/arm/mach-ixp4xx/avila-pci.c
@@ -65,10 +65,9 @@ static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
65 65
66struct hw_pci avila_pci __initdata = { 66struct hw_pci avila_pci __initdata = {
67 .nr_controllers = 1, 67 .nr_controllers = 1,
68 .ops = &ixp4xx_ops,
68 .preinit = avila_pci_preinit, 69 .preinit = avila_pci_preinit,
69 .swizzle = pci_std_swizzle,
70 .setup = ixp4xx_setup, 70 .setup = ixp4xx_setup,
71 .scan = ixp4xx_scan_bus,
72 .map_irq = avila_map_irq, 71 .map_irq = avila_map_irq,
73}; 72};
74 73
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index d5719eb42591..1694f01ce2b6 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -480,12 +480,6 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
480 return 1; 480 return 1;
481} 481}
482 482
483struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
484{
485 return pci_scan_root_bus(NULL, sys->busnr, &ixp4xx_ops, sys,
486 &sys->resources);
487}
488
489int dma_set_coherent_mask(struct device *dev, u64 mask) 483int dma_set_coherent_mask(struct device *dev, u64 mask)
490{ 484{
491 if (mask >= SZ_64M - 1) 485 if (mask >= SZ_64M - 1)
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index 71f5c9c60fc3..5d14ce2aee6d 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -48,10 +48,9 @@ static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
48 48
49struct hw_pci coyote_pci __initdata = { 49struct hw_pci coyote_pci __initdata = {
50 .nr_controllers = 1, 50 .nr_controllers = 1,
51 .ops = &ixp4xx_ops,
51 .preinit = coyote_pci_preinit, 52 .preinit = coyote_pci_preinit,
52 .swizzle = pci_std_swizzle,
53 .setup = ixp4xx_setup, 53 .setup = ixp4xx_setup,
54 .scan = ixp4xx_scan_bus,
55 .map_irq = coyote_map_irq, 54 .map_irq = coyote_map_irq,
56}; 55};
57 56
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c
index 0532510b5e8c..8dca76937723 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-pci.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c
@@ -62,10 +62,9 @@ static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
62 62
63struct hw_pci __initdata dsmg600_pci = { 63struct hw_pci __initdata dsmg600_pci = {
64 .nr_controllers = 1, 64 .nr_controllers = 1,
65 .ops = &ixp4xx_ops,
65 .preinit = dsmg600_pci_preinit, 66 .preinit = dsmg600_pci_preinit,
66 .swizzle = pci_std_swizzle,
67 .setup = ixp4xx_setup, 67 .setup = ixp4xx_setup,
68 .scan = ixp4xx_scan_bus,
69 .map_irq = dsmg600_map_irq, 68 .map_irq = dsmg600_map_irq,
70}; 69};
71 70
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
index d2ac803328f7..fd4a8625b4ae 100644
--- a/arch/arm/mach-ixp4xx/fsg-pci.c
+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
@@ -59,10 +59,9 @@ static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
59 59
60struct hw_pci fsg_pci __initdata = { 60struct hw_pci fsg_pci __initdata = {
61 .nr_controllers = 1, 61 .nr_controllers = 1,
62 .ops = &ixp4xx_ops,
62 .preinit = fsg_pci_preinit, 63 .preinit = fsg_pci_preinit,
63 .swizzle = pci_std_swizzle,
64 .setup = ixp4xx_setup, 64 .setup = ixp4xx_setup,
65 .scan = ixp4xx_scan_bus,
66 .map_irq = fsg_map_irq, 65 .map_irq = fsg_map_irq,
67}; 66};
68 67
diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c
index 76581fb467c4..d9d6cc089707 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-pci.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c
@@ -47,10 +47,9 @@ static int __init gateway7001_map_irq(const struct pci_dev *dev, u8 slot,
47 47
48struct hw_pci gateway7001_pci __initdata = { 48struct hw_pci gateway7001_pci __initdata = {
49 .nr_controllers = 1, 49 .nr_controllers = 1,
50 .ops = &ixp4xx_ops,
50 .preinit = gateway7001_pci_preinit, 51 .preinit = gateway7001_pci_preinit,
51 .swizzle = pci_std_swizzle,
52 .setup = ixp4xx_setup, 52 .setup = ixp4xx_setup,
53 .scan = ixp4xx_scan_bus,
54 .map_irq = gateway7001_map_irq, 53 .map_irq = gateway7001_map_irq,
55}; 54};
56 55
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index 46bb924962ee..b800a031207c 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -473,11 +473,10 @@ static int __init gmlr_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
473 473
474static struct hw_pci gmlr_hw_pci __initdata = { 474static struct hw_pci gmlr_hw_pci __initdata = {
475 .nr_controllers = 1, 475 .nr_controllers = 1,
476 .ops = &ixp4xx_ops,
476 .preinit = gmlr_pci_preinit, 477 .preinit = gmlr_pci_preinit,
477 .postinit = gmlr_pci_postinit, 478 .postinit = gmlr_pci_postinit,
478 .swizzle = pci_std_swizzle,
479 .setup = ixp4xx_setup, 479 .setup = ixp4xx_setup,
480 .scan = ixp4xx_scan_bus,
481 .map_irq = gmlr_map_irq, 480 .map_irq = gmlr_map_irq,
482}; 481};
483 482
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index d68fc068c38d..551d114c9e14 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -67,10 +67,9 @@ static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
67 67
68struct hw_pci gtwx5715_pci __initdata = { 68struct hw_pci gtwx5715_pci __initdata = {
69 .nr_controllers = 1, 69 .nr_controllers = 1,
70 .ops = &ixp4xx_ops,
70 .preinit = gtwx5715_pci_preinit, 71 .preinit = gtwx5715_pci_preinit,
71 .swizzle = pci_std_swizzle,
72 .setup = ixp4xx_setup, 72 .setup = ixp4xx_setup,
73 .scan = ixp4xx_scan_bus,
74 .map_irq = gtwx5715_map_irq, 73 .map_irq = gtwx5715_map_irq,
75}; 74};
76 75
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index b66bedc64de1..5bce94aacca9 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -130,7 +130,7 @@ extern void ixp4xx_restart(char, const char *);
130extern void ixp4xx_pci_preinit(void); 130extern void ixp4xx_pci_preinit(void);
131struct pci_sys_data; 131struct pci_sys_data;
132extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 132extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
133extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); 133extern struct pci_ops ixp4xx_ops;
134 134
135/* 135/*
136 * GPIO-functions 136 * GPIO-functions
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index fffd8c5e40bf..318424dd3c50 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -60,10 +60,9 @@ static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
60 60
61struct hw_pci ixdp425_pci __initdata = { 61struct hw_pci ixdp425_pci __initdata = {
62 .nr_controllers = 1, 62 .nr_controllers = 1,
63 .ops = &ixp4xx_ops,
63 .preinit = ixdp425_pci_preinit, 64 .preinit = ixdp425_pci_preinit,
64 .swizzle = pci_std_swizzle,
65 .setup = ixp4xx_setup, 65 .setup = ixp4xx_setup,
66 .scan = ixp4xx_scan_bus,
67 .map_irq = ixdp425_map_irq, 66 .map_irq = ixdp425_map_irq,
68}; 67};
69 68
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index 34efe75015ec..1f8717ba13dc 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -42,10 +42,9 @@ static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
42 42
43struct hw_pci ixdpg425_pci __initdata = { 43struct hw_pci ixdpg425_pci __initdata = {
44 .nr_controllers = 1, 44 .nr_controllers = 1,
45 .ops = &ixp4xx_ops,
45 .preinit = ixdpg425_pci_preinit, 46 .preinit = ixdpg425_pci_preinit,
46 .swizzle = pci_std_swizzle,
47 .setup = ixp4xx_setup, 47 .setup = ixp4xx_setup,
48 .scan = ixp4xx_scan_bus,
49 .map_irq = ixdpg425_map_irq, 48 .map_irq = ixdpg425_map_irq,
50}; 49};
51 50
diff --git a/arch/arm/mach-ixp4xx/miccpt-pci.c b/arch/arm/mach-ixp4xx/miccpt-pci.c
index ca0bae7fca90..d114ccd2017c 100644
--- a/arch/arm/mach-ixp4xx/miccpt-pci.c
+++ b/arch/arm/mach-ixp4xx/miccpt-pci.c
@@ -61,10 +61,9 @@ static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
61 61
62struct hw_pci miccpt_pci __initdata = { 62struct hw_pci miccpt_pci __initdata = {
63 .nr_controllers = 1, 63 .nr_controllers = 1,
64 .ops = &ixp4xx_ops,
64 .preinit = miccpt_pci_preinit, 65 .preinit = miccpt_pci_preinit,
65 .swizzle = pci_std_swizzle,
66 .setup = ixp4xx_setup, 66 .setup = ixp4xx_setup,
67 .scan = ixp4xx_scan_bus,
68 .map_irq = miccpt_map_irq, 67 .map_irq = miccpt_map_irq,
69}; 68};
70 69
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index 5434ccf553eb..8f0eba0a6800 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -58,10 +58,9 @@ static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
58 58
59struct hw_pci __initdata nas100d_pci = { 59struct hw_pci __initdata nas100d_pci = {
60 .nr_controllers = 1, 60 .nr_controllers = 1,
61 .ops = &ixp4xx_ops,
61 .preinit = nas100d_pci_preinit, 62 .preinit = nas100d_pci_preinit,
62 .swizzle = pci_std_swizzle,
63 .setup = ixp4xx_setup, 63 .setup = ixp4xx_setup,
64 .scan = ixp4xx_scan_bus,
65 .map_irq = nas100d_map_irq, 64 .map_irq = nas100d_map_irq,
66}; 65};
67 66
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index b57160535e47..032defe111aa 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -54,10 +54,9 @@ static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
54 54
55struct hw_pci __initdata nslu2_pci = { 55struct hw_pci __initdata nslu2_pci = {
56 .nr_controllers = 1, 56 .nr_controllers = 1,
57 .ops = &ixp4xx_ops,
57 .preinit = nslu2_pci_preinit, 58 .preinit = nslu2_pci_preinit,
58 .swizzle = pci_std_swizzle,
59 .setup = ixp4xx_setup, 59 .setup = ixp4xx_setup,
60 .scan = ixp4xx_scan_bus,
61 .map_irq = nslu2_map_irq, 60 .map_irq = nslu2_map_irq,
62}; 61};
63 62
diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c
index 0bc3f34c282f..a4220fa5e0c3 100644
--- a/arch/arm/mach-ixp4xx/vulcan-pci.c
+++ b/arch/arm/mach-ixp4xx/vulcan-pci.c
@@ -56,10 +56,9 @@ static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
56 56
57struct hw_pci vulcan_pci __initdata = { 57struct hw_pci vulcan_pci __initdata = {
58 .nr_controllers = 1, 58 .nr_controllers = 1,
59 .ops = &ixp4xx_ops,
59 .preinit = vulcan_pci_preinit, 60 .preinit = vulcan_pci_preinit,
60 .swizzle = pci_std_swizzle,
61 .setup = ixp4xx_setup, 61 .setup = ixp4xx_setup,
62 .scan = ixp4xx_scan_bus,
63 .map_irq = vulcan_map_irq, 62 .map_irq = vulcan_map_irq,
64}; 63};
65 64
diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c
index f27dfcfe811b..c92e5b82af36 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-pci.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c
@@ -46,10 +46,9 @@ static int __init wg302v2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
46 46
47struct hw_pci wg302v2_pci __initdata = { 47struct hw_pci wg302v2_pci __initdata = {
48 .nr_controllers = 1, 48 .nr_controllers = 1,
49 .ops = &ixp4xx_ops,
49 .preinit = wg302v2_pci_preinit, 50 .preinit = wg302v2_pci_preinit,
50 .swizzle = pci_std_swizzle,
51 .setup = ixp4xx_setup, 51 .setup = ixp4xx_setup,
52 .scan = ixp4xx_scan_bus,
53 .map_irq = wg302v2_map_irq, 52 .map_irq = wg302v2_map_irq,
54}; 53};
55 54