diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-25 03:19:59 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-25 03:19:59 -0400 |
commit | bdf4e9482360a3ddc1619efbd5d1c928ede8c3fa (patch) | |
tree | b02319e809c5b8abfca85409a11472775e27f597 /arch/arm/mach-ixp4xx | |
parent | 06afb1a087d49ae0f676b2e5b9ffe5f4b3aba355 (diff) | |
parent | eb0474544bc16a9dab53b26abd846e86ba814eb1 (diff) |
Merge branch 'misc' into for-linus
Conflicts:
arch/arm/mach-integrator/integrator_ap.c
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r-- | arch/arm/mach-ixp4xx/Makefile.boot | 2 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/common-pci.c | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-ixp4xx/Makefile.boot b/arch/arm/mach-ixp4xx/Makefile.boot index d84c5807a43d..9c7af91d93da 100644 --- a/arch/arm/mach-ixp4xx/Makefile.boot +++ b/arch/arm/mach-ixp4xx/Makefile.boot | |||
@@ -1,3 +1,3 @@ | |||
1 | zreladdr-y := 0x00008000 | 1 | zreladdr-y += 0x00008000 |
2 | params_phys-y := 0x00000100 | 2 | params_phys-y := 0x00000100 |
3 | 3 | ||
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 2131832ee6ba..85245e48099c 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -397,7 +397,8 @@ void __init ixp4xx_pci_preinit(void) | |||
397 | local_write_config(PCI_BASE_ADDRESS_0, 4, PHYS_OFFSET); | 397 | local_write_config(PCI_BASE_ADDRESS_0, 4, PHYS_OFFSET); |
398 | local_write_config(PCI_BASE_ADDRESS_1, 4, PHYS_OFFSET + SZ_16M); | 398 | local_write_config(PCI_BASE_ADDRESS_1, 4, PHYS_OFFSET + SZ_16M); |
399 | local_write_config(PCI_BASE_ADDRESS_2, 4, PHYS_OFFSET + SZ_32M); | 399 | local_write_config(PCI_BASE_ADDRESS_2, 4, PHYS_OFFSET + SZ_32M); |
400 | local_write_config(PCI_BASE_ADDRESS_3, 4, PHYS_OFFSET + SZ_48M); | 400 | local_write_config(PCI_BASE_ADDRESS_3, 4, |
401 | PHYS_OFFSET + SZ_32M + SZ_16M); | ||
401 | 402 | ||
402 | /* | 403 | /* |
403 | * Enable CSR window at 64 MiB to allow PCI masters | 404 | * Enable CSR window at 64 MiB to allow PCI masters |