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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 23:25:36 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 23:25:36 -0400
commitf906fb1d70e016726fccfb0d978c5d425503db9d (patch)
treeb2bac5fbe7d2eb81dd7fe6cc88e27dddd0189c84 /arch/arm/mach-ixp4xx
parent510597e26e2a072e2d46ea5bc57feaf385e37f70 (diff)
parenta7fadac10ffbfd16cc7ccf951eab1ecf85e1abdf (diff)
Merge branch 'next/board' of git://git.linaro.org/people/arnd/arm-soc
* 'next/board' of git://git.linaro.org/people/arnd/arm-soc: (34 commits) ep93xx: add support Vision EP9307 SoM ARM: mxs: Add initial support for DENX MX28 ARM: EXYNOS4: Add support SMDK4412 Board ARM: EXYNOS4: Add MCT support for EXYNOS4412 ARM: EXYNOS4: Add functions for gic interrupt handling ARM: EXYNOS4: Add support clock for EXYNOS4412 ARM: EXYNOS4: Add support new EXYNOS4412 SoC ARM: EXYNOS4: Add support MCT PPI for EXYNOS4212 ARM: EXYNOS4: Add support PPI in external GIC ARM: EXYNOS4: convert boot_params to atag_offset ixp4xx: support omicron ixp425 based boards ARM: EXYNOS4: Add support SMDK4212 Board ARM: EXYNOS4: Add support PM for EXYNOS4212 ARM: EXYNOS4: Add support clock for EXYNOS4212 ARM: EXYNOS4: Add support new EXYNOS4212 SoC at91: USB-A9G20 C01 & C11 board support at91: merge board USB-A9260 and USB-A9263 together at91: add support for RSIs EWS board ARM: SAMSUNG: Fix mask value for S5P64X0 CPU IDs ARM: SAMSUNG: Fix mask for S3C64xx CPU IDs ...
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/Kconfig19
-rw-r--r--arch/arm/mach-ixp4xx/Makefile4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-ixp4xx/miccpt-pci.c78
-rw-r--r--arch/arm/mach-ixp4xx/omixp-setup.c273
5 files changed, 376 insertions, 1 deletions
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 6f991c5ae863..fd5e7b6881bf 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -179,6 +179,25 @@ config MACH_GTWX5715
179 "High Speed" UART is n/c (as far as I can tell) 179 "High Speed" UART is n/c (as far as I can tell)
180 20 Pin ARM/Xscale JTAG interface on J2 180 20 Pin ARM/Xscale JTAG interface on J2
181 181
182config MACH_DEVIXP
183 bool "Omicron DEVIXP"
184 help
185 Say 'Y' here if you want your kernel to support the DEVIXP
186 board from OMICRON electronics GmbH.
187
188config MACH_MICCPT
189 bool "Omicron MICCPT"
190 select PCI
191 help
192 Say 'Y' here if you want your kernel to support the MICCPT
193 board from OMICRON electronics GmbH.
194
195config MACH_MIC256
196 bool "Omicron MIC256"
197 help
198 Say 'Y' here if you want your kernel to support the MIC256
199 board from OMICRON electronics GmbH.
200
182comment "IXP4xx Options" 201comment "IXP4xx Options"
183 202
184config IXP4XX_INDIRECT_PCI 203config IXP4XX_INDIRECT_PCI
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
index d807fc367dd3..eded94c96dd4 100644
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -10,6 +10,7 @@ obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
10obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o 10obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
11obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o 11obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
12obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o 12obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
13obj-pci-$(CONFIG_MACH_MICCPT) += miccpt-pci.o
13obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o 14obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o
14obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o 15obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
15obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o 16obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
@@ -25,6 +26,9 @@ obj-$(CONFIG_MACH_AVILA) += avila-setup.o
25obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o 26obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
26obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o 27obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
27obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o 28obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
29obj-$(CONFIG_MACH_DEVIXP) += omixp-setup.o
30obj-$(CONFIG_MACH_MICCPT) += omixp-setup.o
31obj-$(CONFIG_MACH_MIC256) += omixp-setup.o
28obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o 32obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o
29obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o 33obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o
30obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o 34obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o
diff --git a/arch/arm/mach-ixp4xx/include/mach/uncompress.h b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
index 219d7c1dcdba..eb945a926d07 100644
--- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
@@ -41,7 +41,8 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
41 * Some boards are using UART2 as console 41 * Some boards are using UART2 as console
42 */ 42 */
43 if (machine_is_adi_coyote() || machine_is_gtwx5715() || 43 if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
44 machine_is_gateway7001() || machine_is_wg302v2()) 44 machine_is_gateway7001() || machine_is_wg302v2() ||
45 machine_is_devixp() || machine_is_miccpt() || machine_is_mic256())
45 uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; 46 uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
46 else 47 else
47 uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; 48 uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
diff --git a/arch/arm/mach-ixp4xx/miccpt-pci.c b/arch/arm/mach-ixp4xx/miccpt-pci.c
new file mode 100644
index 000000000000..ca0bae7fca90
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/miccpt-pci.c
@@ -0,0 +1,78 @@
1/*
2 * arch/arm/mach-ixp4xx/miccpt-pci.c
3 *
4 * MICCPT board-level PCI initialization
5 *
6 * Copyright (C) 2002 Intel Corporation.
7 * Copyright (C) 2003-2004 MontaVista Software, Inc.
8 * Copyright (C) 2006 OMICRON electronics GmbH
9 *
10 * Author: Michael Jochum <michael.jochum@omicron.at>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/irq.h>
23#include <asm/mach/pci.h>
24#include <asm/irq.h>
25#include <mach/hardware.h>
26#include <asm/mach-types.h>
27
28#define MAX_DEV 4
29#define IRQ_LINES 4
30
31/* PCI controller GPIO to IRQ pin mappings */
32#define INTA 1
33#define INTB 2
34#define INTC 3
35#define INTD 4
36
37
38void __init miccpt_pci_preinit(void)
39{
40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
41 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
43 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
44 ixp4xx_pci_preinit();
45}
46
47static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
48{
49 static int pci_irq_table[IRQ_LINES] = {
50 IXP4XX_GPIO_IRQ(INTA),
51 IXP4XX_GPIO_IRQ(INTB),
52 IXP4XX_GPIO_IRQ(INTC),
53 IXP4XX_GPIO_IRQ(INTD)
54 };
55
56 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
57 return pci_irq_table[(slot + pin - 2) % 4];
58
59 return -1;
60}
61
62struct hw_pci miccpt_pci __initdata = {
63 .nr_controllers = 1,
64 .preinit = miccpt_pci_preinit,
65 .swizzle = pci_std_swizzle,
66 .setup = ixp4xx_setup,
67 .scan = ixp4xx_scan_bus,
68 .map_irq = miccpt_map_irq,
69};
70
71int __init miccpt_pci_init(void)
72{
73 if (machine_is_miccpt())
74 pci_common_init(&miccpt_pci);
75 return 0;
76}
77
78subsys_initcall(miccpt_pci_init);
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
new file mode 100644
index 000000000000..3b6a81a696fc
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -0,0 +1,273 @@
1/*
2 * arch/arm/mach-ixp4xx/omixp-setup.c
3 *
4 * omicron ixp4xx board setup
5 * Copyright (C) 2009 OMICRON electronics GmbH
6 *
7 * based nslu2-setup.c, ixdp425-setup.c:
8 * Copyright (C) 2003-2004 MontaVista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/serial.h>
17#include <linux/serial_8250.h>
18#include <linux/mtd/mtd.h>
19#include <linux/mtd/partitions.h>
20#ifdef CONFIG_LEDS_CLASS
21#include <linux/leds.h>
22#endif
23
24#include <asm/setup.h>
25#include <asm/memory.h>
26#include <asm/mach-types.h>
27#include <asm/mach/arch.h>
28#include <asm/mach/flash.h>
29
30static struct resource omixp_flash_resources[] = {
31 {
32 .flags = IORESOURCE_MEM,
33 }, {
34 .flags = IORESOURCE_MEM,
35 },
36};
37
38static struct mtd_partition omixp_partitions[] = {
39 {
40 .name = "Recovery Bootloader",
41 .size = 0x00020000,
42 .offset = 0,
43 }, {
44 .name = "Calibration Data",
45 .size = 0x00020000,
46 .offset = 0x00020000,
47 }, {
48 .name = "Recovery FPGA",
49 .size = 0x00020000,
50 .offset = 0x00040000,
51 }, {
52 .name = "Release Bootloader",
53 .size = 0x00020000,
54 .offset = 0x00060000,
55 }, {
56 .name = "Release FPGA",
57 .size = 0x00020000,
58 .offset = 0x00080000,
59 }, {
60 .name = "Kernel",
61 .size = 0x00160000,
62 .offset = 0x000a0000,
63 }, {
64 .name = "Filesystem",
65 .size = 0x00C00000,
66 .offset = 0x00200000,
67 }, {
68 .name = "Persistent Storage",
69 .size = 0x00200000,
70 .offset = 0x00E00000,
71 },
72};
73
74static struct flash_platform_data omixp_flash_data[] = {
75 {
76 .map_name = "cfi_probe",
77 .parts = omixp_partitions,
78 .nr_parts = ARRAY_SIZE(omixp_partitions),
79 }, {
80 .map_name = "cfi_probe",
81 .parts = NULL,
82 .nr_parts = 0,
83 },
84};
85
86static struct platform_device omixp_flash_device[] = {
87 {
88 .name = "IXP4XX-Flash",
89 .id = 0,
90 .dev = {
91 .platform_data = &omixp_flash_data[0],
92 },
93 .resource = &omixp_flash_resources[0],
94 .num_resources = 1,
95 }, {
96 .name = "IXP4XX-Flash",
97 .id = 1,
98 .dev = {
99 .platform_data = &omixp_flash_data[1],
100 },
101 .resource = &omixp_flash_resources[1],
102 .num_resources = 1,
103 },
104};
105
106/* Swap UART's - These boards have the console on UART2. The following
107 * configuration is used:
108 * ttyS0 .. UART2
109 * ttyS1 .. UART1
110 * This way standard images can be used with the kernel that expect
111 * the console on ttyS0.
112 */
113static struct resource omixp_uart_resources[] = {
114 {
115 .start = IXP4XX_UART2_BASE_PHYS,
116 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
117 .flags = IORESOURCE_MEM,
118 }, {
119 .start = IXP4XX_UART1_BASE_PHYS,
120 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
121 .flags = IORESOURCE_MEM,
122 },
123};
124
125static struct plat_serial8250_port omixp_uart_data[] = {
126 {
127 .mapbase = IXP4XX_UART2_BASE_PHYS,
128 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
129 .irq = IRQ_IXP4XX_UART2,
130 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
131 .iotype = UPIO_MEM,
132 .regshift = 2,
133 .uartclk = IXP4XX_UART_XTAL,
134 }, {
135 .mapbase = IXP4XX_UART1_BASE_PHYS,
136 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
137 .irq = IRQ_IXP4XX_UART1,
138 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
139 .iotype = UPIO_MEM,
140 .regshift = 2,
141 .uartclk = IXP4XX_UART_XTAL,
142 }, {
143 /* list termination */
144 }
145};
146
147static struct platform_device omixp_uart = {
148 .name = "serial8250",
149 .id = PLAT8250_DEV_PLATFORM,
150 .dev.platform_data = omixp_uart_data,
151 .num_resources = 2,
152 .resource = omixp_uart_resources,
153};
154
155static struct gpio_led mic256_led_pins[] = {
156 {
157 .name = "LED-A",
158 .gpio = 7,
159 },
160};
161
162static struct gpio_led_platform_data mic256_led_data = {
163 .num_leds = ARRAY_SIZE(mic256_led_pins),
164 .leds = mic256_led_pins,
165};
166
167static struct platform_device mic256_leds = {
168 .name = "leds-gpio",
169 .id = -1,
170 .dev.platform_data = &mic256_led_data,
171};
172
173/* Built-in 10/100 Ethernet MAC interfaces */
174static struct eth_plat_info ixdp425_plat_eth[] = {
175 {
176 .phy = 0,
177 .rxq = 3,
178 .txreadyq = 20,
179 }, {
180 .phy = 1,
181 .rxq = 4,
182 .txreadyq = 21,
183 },
184};
185
186static struct platform_device ixdp425_eth[] = {
187 {
188 .name = "ixp4xx_eth",
189 .id = IXP4XX_ETH_NPEB,
190 .dev.platform_data = ixdp425_plat_eth,
191 }, {
192 .name = "ixp4xx_eth",
193 .id = IXP4XX_ETH_NPEC,
194 .dev.platform_data = ixdp425_plat_eth + 1,
195 },
196};
197
198
199static struct platform_device *devixp_pldev[] __initdata = {
200 &omixp_uart,
201 &omixp_flash_device[0],
202 &ixdp425_eth[0],
203 &ixdp425_eth[1],
204};
205
206static struct platform_device *mic256_pldev[] __initdata = {
207 &omixp_uart,
208 &omixp_flash_device[0],
209 &mic256_leds,
210 &ixdp425_eth[0],
211 &ixdp425_eth[1],
212};
213
214static struct platform_device *miccpt_pldev[] __initdata = {
215 &omixp_uart,
216 &omixp_flash_device[0],
217 &omixp_flash_device[1],
218 &ixdp425_eth[0],
219 &ixdp425_eth[1],
220};
221
222static void __init omixp_init(void)
223{
224 ixp4xx_sys_init();
225
226 /* 16MiB Boot Flash */
227 omixp_flash_resources[0].start = IXP4XX_EXP_BUS_BASE(0);
228 omixp_flash_resources[0].end = IXP4XX_EXP_BUS_END(0);
229
230 /* 32 MiB Data Flash */
231 omixp_flash_resources[1].start = IXP4XX_EXP_BUS_BASE(2);
232 omixp_flash_resources[1].end = IXP4XX_EXP_BUS_END(2);
233
234 if (machine_is_devixp())
235 platform_add_devices(devixp_pldev, ARRAY_SIZE(devixp_pldev));
236 else if (machine_is_miccpt())
237 platform_add_devices(miccpt_pldev, ARRAY_SIZE(miccpt_pldev));
238 else if (machine_is_mic256())
239 platform_add_devices(mic256_pldev, ARRAY_SIZE(mic256_pldev));
240}
241
242#ifdef CONFIG_MACH_DEVIXP
243MACHINE_START(DEVIXP, "Omicron DEVIXP")
244 .atag_offset = 0x100,
245 .map_io = ixp4xx_map_io,
246 .init_irq = ixp4xx_init_irq,
247 .timer = &ixp4xx_timer,
248 .init_machine = omixp_init,
249MACHINE_END
250#endif
251
252#ifdef CONFIG_MACH_MICCPT
253MACHINE_START(MICCPT, "Omicron MICCPT")
254 .atag_offset = 0x100,
255 .map_io = ixp4xx_map_io,
256 .init_irq = ixp4xx_init_irq,
257 .timer = &ixp4xx_timer,
258 .init_machine = omixp_init,
259#if defined(CONFIG_PCI)
260 .dma_zone_size = SZ_64M,
261#endif
262MACHINE_END
263#endif
264
265#ifdef CONFIG_MACH_MIC256
266MACHINE_START(MIC256, "Omicron MIC256")
267 .atag_offset = 0x100,
268 .map_io = ixp4xx_map_io,
269 .init_irq = ixp4xx_init_irq,
270 .timer = &ixp4xx_timer,
271 .init_machine = omixp_init,
272MACHINE_END
273#endif