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authorKrzysztof Hałasa <khc@pm.waw.pl>2009-11-17 12:48:23 -0500
committerKrzysztof Hałasa <khc@pm.waw.pl>2009-12-05 10:58:41 -0500
commit8d3fdf31dd2066533861bb57ed7df1ae1b1f5fcc (patch)
tree5186d63c67dee5454348e55cf46d31053672d67d /arch/arm/mach-ixp4xx/nslu2-pci.c
parenta8b7b34075f693632cd1483b817d4211c7a63257 (diff)
IXP4xx: Introduce IXP4XX_GPIO_IRQ(n) macro and convert IXP4xx platform files.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx/nslu2-pci.c')
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-pci.c40
1 files changed, 16 insertions, 24 deletions
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index 9665bb082107..1eb5a90470bc 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -21,43 +21,35 @@
21#include <asm/mach/pci.h> 21#include <asm/mach/pci.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23 23
24#define NSLU2_PCI_MAX_DEV 3 24#define MAX_DEV 3
25#define NSLU2_PCI_IRQ_LINES 3 25#define IRQ_LINES 3
26 26
27/* PCI controller GPIO to IRQ pin mappings */ 27/* PCI controller GPIO to IRQ pin mappings */
28#define NSLU2_PCI_INTA_PIN 11 28#define INTA 11
29#define NSLU2_PCI_INTB_PIN 10 29#define INTB 10
30#define NSLU2_PCI_INTC_PIN 9 30#define INTC 9
31#define NSLU2_PCI_INTD_PIN 8 31#define INTD 8
32#define IRQ_NSLU2_PCI_INTA IRQ_IXP4XX_GPIO11
33#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10
34#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9
35 32
36void __init nslu2_pci_preinit(void) 33void __init nslu2_pci_preinit(void)
37{ 34{
38 set_irq_type(IRQ_NSLU2_PCI_INTA, IRQ_TYPE_LEVEL_LOW); 35 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
39 set_irq_type(IRQ_NSLU2_PCI_INTB, IRQ_TYPE_LEVEL_LOW); 36 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
40 set_irq_type(IRQ_NSLU2_PCI_INTC, IRQ_TYPE_LEVEL_LOW); 37 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
41
42 ixp4xx_pci_preinit(); 38 ixp4xx_pci_preinit();
43} 39}
44 40
45static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 41static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
46{ 42{
47 static int pci_irq_table[NSLU2_PCI_IRQ_LINES] = { 43 static int pci_irq_table[IRQ_LINES] = {
48 IRQ_NSLU2_PCI_INTA, 44 IXP4XX_GPIO_IRQ(INTA),
49 IRQ_NSLU2_PCI_INTB, 45 IXP4XX_GPIO_IRQ(INTB),
50 IRQ_NSLU2_PCI_INTC, 46 IXP4XX_GPIO_IRQ(INTC),
51 }; 47 };
52 48
53 int irq = -1; 49 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
54 50 return pci_irq_table[(slot + pin - 2) % IRQ_LINES];
55 if (slot >= 1 && slot <= NSLU2_PCI_MAX_DEV &&
56 pin >= 1 && pin <= NSLU2_PCI_IRQ_LINES) {
57 irq = pci_irq_table[(slot + pin - 2) % NSLU2_PCI_IRQ_LINES];
58 }
59 51
60 return irq; 52 return -1;
61} 53}
62 54
63struct hw_pci __initdata nslu2_pci = { 55struct hw_pci __initdata nslu2_pci = {