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authorRichard Cochran <richardcochran@gmail.com>2011-09-28 09:16:41 -0400
committerArnd Bergmann <arnd@arndb.de>2011-09-30 16:18:42 -0400
commit2b8f0119b857d32f827641a9f7b31fe8d31bfde6 (patch)
tree08bab78b826d82871bbd70226cf82ee71b9b9228 /arch/arm/mach-ixp4xx/miccpt-pci.c
parentddf28352b80c86754a6424e3a61e8bdf9213b3c7 (diff)
ixp4xx: support omicron ixp425 based boards
This patch adds board support for the DEVIXP, the MICCPT, and the MIC256, which are three IXP425 based boards produced by OMICRON electronics, GmbH. Signed-off-by: Richard Cochran <richard.cochran@omicron.at> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ixp4xx/miccpt-pci.c')
-rw-r--r--arch/arm/mach-ixp4xx/miccpt-pci.c78
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp4xx/miccpt-pci.c b/arch/arm/mach-ixp4xx/miccpt-pci.c
new file mode 100644
index 000000000000..ca0bae7fca90
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/miccpt-pci.c
@@ -0,0 +1,78 @@
1/*
2 * arch/arm/mach-ixp4xx/miccpt-pci.c
3 *
4 * MICCPT board-level PCI initialization
5 *
6 * Copyright (C) 2002 Intel Corporation.
7 * Copyright (C) 2003-2004 MontaVista Software, Inc.
8 * Copyright (C) 2006 OMICRON electronics GmbH
9 *
10 * Author: Michael Jochum <michael.jochum@omicron.at>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/irq.h>
23#include <asm/mach/pci.h>
24#include <asm/irq.h>
25#include <mach/hardware.h>
26#include <asm/mach-types.h>
27
28#define MAX_DEV 4
29#define IRQ_LINES 4
30
31/* PCI controller GPIO to IRQ pin mappings */
32#define INTA 1
33#define INTB 2
34#define INTC 3
35#define INTD 4
36
37
38void __init miccpt_pci_preinit(void)
39{
40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
41 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
43 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
44 ixp4xx_pci_preinit();
45}
46
47static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
48{
49 static int pci_irq_table[IRQ_LINES] = {
50 IXP4XX_GPIO_IRQ(INTA),
51 IXP4XX_GPIO_IRQ(INTB),
52 IXP4XX_GPIO_IRQ(INTC),
53 IXP4XX_GPIO_IRQ(INTD)
54 };
55
56 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
57 return pci_irq_table[(slot + pin - 2) % 4];
58
59 return -1;
60}
61
62struct hw_pci miccpt_pci __initdata = {
63 .nr_controllers = 1,
64 .preinit = miccpt_pci_preinit,
65 .swizzle = pci_std_swizzle,
66 .setup = ixp4xx_setup,
67 .scan = ixp4xx_scan_bus,
68 .map_irq = miccpt_map_irq,
69};
70
71int __init miccpt_pci_init(void)
72{
73 if (machine_is_miccpt())
74 pci_common_init(&miccpt_pci);
75 return 0;
76}
77
78subsys_initcall(miccpt_pci_init);