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author | Krzysztof Hałasa <khc@pm.waw.pl> | 2009-11-17 12:48:23 -0500 |
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committer | Krzysztof Hałasa <khc@pm.waw.pl> | 2009-12-05 10:58:41 -0500 |
commit | 8d3fdf31dd2066533861bb57ed7df1ae1b1f5fcc (patch) | |
tree | 5186d63c67dee5454348e55cf46d31053672d67d /arch/arm/mach-ixp4xx/ixdp425-pci.c | |
parent | a8b7b34075f693632cd1483b817d4211c7a63257 (diff) |
IXP4xx: Introduce IXP4XX_GPIO_IRQ(n) macro and convert IXP4xx platform files.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx/ixdp425-pci.c')
-rw-r--r-- | arch/arm/mach-ixp4xx/ixdp425-pci.c | 46 |
1 files changed, 18 insertions, 28 deletions
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index dc8b5884875c..1ba165a6edac 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c | |||
@@ -24,47 +24,38 @@ | |||
24 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
25 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
26 | 26 | ||
27 | #define IXDP425_PCI_MAX_DEV 4 | 27 | #define MAX_DEV 4 |
28 | #define IXDP425_PCI_IRQ_LINES 4 | 28 | #define IRQ_LINES 4 |
29 | 29 | ||
30 | /* PCI controller GPIO to IRQ pin mappings */ | 30 | /* PCI controller GPIO to IRQ pin mappings */ |
31 | #define IXDP425_PCI_INTA_PIN 11 | 31 | #define INTA 11 |
32 | #define IXDP425_PCI_INTB_PIN 10 | 32 | #define INTB 10 |
33 | #define IXDP425_PCI_INTC_PIN 9 | 33 | #define INTC 9 |
34 | #define IXDP425_PCI_INTD_PIN 8 | 34 | #define INTD 8 |
35 | 35 | ||
36 | #define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11 | ||
37 | #define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10 | ||
38 | #define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9 | ||
39 | #define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8 | ||
40 | 36 | ||
41 | void __init ixdp425_pci_preinit(void) | 37 | void __init ixdp425_pci_preinit(void) |
42 | { | 38 | { |
43 | set_irq_type(IRQ_IXDP425_PCI_INTA, IRQ_TYPE_LEVEL_LOW); | 39 | set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
44 | set_irq_type(IRQ_IXDP425_PCI_INTB, IRQ_TYPE_LEVEL_LOW); | 40 | set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); |
45 | set_irq_type(IRQ_IXDP425_PCI_INTC, IRQ_TYPE_LEVEL_LOW); | 41 | set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); |
46 | set_irq_type(IRQ_IXDP425_PCI_INTD, IRQ_TYPE_LEVEL_LOW); | 42 | set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); |
47 | |||
48 | ixp4xx_pci_preinit(); | 43 | ixp4xx_pci_preinit(); |
49 | } | 44 | } |
50 | 45 | ||
51 | static int __init ixdp425_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 46 | static int __init ixdp425_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
52 | { | 47 | { |
53 | static int pci_irq_table[IXDP425_PCI_IRQ_LINES] = { | 48 | static int pci_irq_table[IRQ_LINES] = { |
54 | IRQ_IXDP425_PCI_INTA, | 49 | IXP4XX_GPIO_IRQ(INTA), |
55 | IRQ_IXDP425_PCI_INTB, | 50 | IXP4XX_GPIO_IRQ(INTB), |
56 | IRQ_IXDP425_PCI_INTC, | 51 | IXP4XX_GPIO_IRQ(INTC), |
57 | IRQ_IXDP425_PCI_INTD | 52 | IXP4XX_GPIO_IRQ(INTD) |
58 | }; | 53 | }; |
59 | 54 | ||
60 | int irq = -1; | 55 | if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) |
61 | 56 | return pci_irq_table[(slot + pin - 2) % 4]; | |
62 | if (slot >= 1 && slot <= IXDP425_PCI_MAX_DEV && | ||
63 | pin >= 1 && pin <= IXDP425_PCI_IRQ_LINES) { | ||
64 | irq = pci_irq_table[(slot + pin - 2) % 4]; | ||
65 | } | ||
66 | 57 | ||
67 | return irq; | 58 | return -1; |
68 | } | 59 | } |
69 | 60 | ||
70 | struct hw_pci ixdp425_pci __initdata = { | 61 | struct hw_pci ixdp425_pci __initdata = { |
@@ -85,4 +76,3 @@ int __init ixdp425_pci_init(void) | |||
85 | } | 76 | } |
86 | 77 | ||
87 | subsys_initcall(ixdp425_pci_init); | 78 | subsys_initcall(ixdp425_pci_init); |
88 | |||