diff options
author | Krzysztof Hałasa <khc@pm.waw.pl> | 2009-02-19 19:01:33 -0500 |
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committer | Krzysztof Hałasa <khc@pm.waw.pl> | 2009-05-20 09:27:07 -0400 |
commit | a6a9fb857b5599b3cefef5576967389c1c43eb4c (patch) | |
tree | 3a6d3d8e9d7560c1c496fc6c38698687196fab55 /arch/arm/mach-ixp4xx/include | |
parent | 1406de8e11eb043681297adf86d6892ff8efc27a (diff) |
IXP4xx: Add support for the second half of the 64 hardware queues.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx/include')
-rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/qmgr.h | 65 |
1 files changed, 56 insertions, 9 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h index 0cbe6ceb67c5..32077e11f17a 100644 --- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h +++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h | |||
@@ -15,7 +15,7 @@ | |||
15 | #define DEBUG_QMGR 0 | 15 | #define DEBUG_QMGR 0 |
16 | 16 | ||
17 | #define HALF_QUEUES 32 | 17 | #define HALF_QUEUES 32 |
18 | #define QUEUES 64 /* only 32 lower queues currently supported */ | 18 | #define QUEUES 64 |
19 | #define MAX_QUEUE_LENGTH 4 /* in dwords */ | 19 | #define MAX_QUEUE_LENGTH 4 /* in dwords */ |
20 | 20 | ||
21 | #define QUEUE_STAT1_EMPTY 1 /* queue status bits */ | 21 | #define QUEUE_STAT1_EMPTY 1 /* queue status bits */ |
@@ -110,48 +110,95 @@ static inline u32 qmgr_get_entry(unsigned int queue) | |||
110 | return val; | 110 | return val; |
111 | } | 111 | } |
112 | 112 | ||
113 | static inline int qmgr_get_stat1(unsigned int queue) | 113 | static inline int __qmgr_get_stat1(unsigned int queue) |
114 | { | 114 | { |
115 | extern struct qmgr_regs __iomem *qmgr_regs; | 115 | extern struct qmgr_regs __iomem *qmgr_regs; |
116 | return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) | 116 | return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) |
117 | >> ((queue & 7) << 2)) & 0xF; | 117 | >> ((queue & 7) << 2)) & 0xF; |
118 | } | 118 | } |
119 | 119 | ||
120 | static inline int qmgr_get_stat2(unsigned int queue) | 120 | static inline int __qmgr_get_stat2(unsigned int queue) |
121 | { | 121 | { |
122 | extern struct qmgr_regs __iomem *qmgr_regs; | 122 | extern struct qmgr_regs __iomem *qmgr_regs; |
123 | BUG_ON(queue >= HALF_QUEUES); | ||
123 | return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) | 124 | return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) |
124 | >> ((queue & 0xF) << 1)) & 0x3; | 125 | >> ((queue & 0xF) << 1)) & 0x3; |
125 | } | 126 | } |
126 | 127 | ||
128 | /** | ||
129 | * qmgr_stat_empty() - checks if a hardware queue is empty | ||
130 | * @queue: queue number | ||
131 | * | ||
132 | * Returns non-zero value if the queue is empty. | ||
133 | */ | ||
127 | static inline int qmgr_stat_empty(unsigned int queue) | 134 | static inline int qmgr_stat_empty(unsigned int queue) |
128 | { | 135 | { |
129 | return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_EMPTY); | 136 | BUG_ON(queue >= HALF_QUEUES); |
137 | return __qmgr_get_stat1(queue) & QUEUE_STAT1_EMPTY; | ||
130 | } | 138 | } |
131 | 139 | ||
140 | /** | ||
141 | * qmgr_stat_empty() - checks if a hardware queue is nearly empty | ||
142 | * @queue: queue number | ||
143 | * | ||
144 | * Returns non-zero value if the queue is nearly or completely empty. | ||
145 | */ | ||
132 | static inline int qmgr_stat_nearly_empty(unsigned int queue) | 146 | static inline int qmgr_stat_nearly_empty(unsigned int queue) |
133 | { | 147 | { |
134 | return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_EMPTY); | 148 | extern struct qmgr_regs __iomem *qmgr_regs; |
149 | if (queue >= HALF_QUEUES) | ||
150 | return (__raw_readl(&qmgr_regs->statne_h) >> | ||
151 | (queue - HALF_QUEUES)) & 0x01; | ||
152 | return __qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_EMPTY; | ||
135 | } | 153 | } |
136 | 154 | ||
155 | /** | ||
156 | * qmgr_stat_empty() - checks if a hardware queue is nearly full | ||
157 | * @queue: queue number | ||
158 | * | ||
159 | * Returns non-zero value if the queue is nearly or completely full. | ||
160 | */ | ||
137 | static inline int qmgr_stat_nearly_full(unsigned int queue) | 161 | static inline int qmgr_stat_nearly_full(unsigned int queue) |
138 | { | 162 | { |
139 | return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_FULL); | 163 | BUG_ON(queue >= HALF_QUEUES); |
164 | return __qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_FULL; | ||
140 | } | 165 | } |
141 | 166 | ||
167 | /** | ||
168 | * qmgr_stat_empty() - checks if a hardware queue is full | ||
169 | * @queue: queue number | ||
170 | * | ||
171 | * Returns non-zero value if the queue is full. | ||
172 | */ | ||
142 | static inline int qmgr_stat_full(unsigned int queue) | 173 | static inline int qmgr_stat_full(unsigned int queue) |
143 | { | 174 | { |
144 | return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_FULL); | 175 | extern struct qmgr_regs __iomem *qmgr_regs; |
176 | if (queue >= HALF_QUEUES) | ||
177 | return (__raw_readl(&qmgr_regs->statf_h) >> | ||
178 | (queue - HALF_QUEUES)) & 0x01; | ||
179 | return __qmgr_get_stat1(queue) & QUEUE_STAT1_FULL; | ||
145 | } | 180 | } |
146 | 181 | ||
182 | /** | ||
183 | * qmgr_stat_empty() - checks if a hardware queue experienced underflow | ||
184 | * @queue: queue number | ||
185 | * | ||
186 | * Returns non-zero value if empty. | ||
187 | */ | ||
147 | static inline int qmgr_stat_underflow(unsigned int queue) | 188 | static inline int qmgr_stat_underflow(unsigned int queue) |
148 | { | 189 | { |
149 | return !!(qmgr_get_stat2(queue) & QUEUE_STAT2_UNDERFLOW); | 190 | return __qmgr_get_stat2(queue) & QUEUE_STAT2_UNDERFLOW; |
150 | } | 191 | } |
151 | 192 | ||
193 | /** | ||
194 | * qmgr_stat_empty() - checks if a hardware queue experienced overflow | ||
195 | * @queue: queue number | ||
196 | * | ||
197 | * Returns non-zero value if empty. | ||
198 | */ | ||
152 | static inline int qmgr_stat_overflow(unsigned int queue) | 199 | static inline int qmgr_stat_overflow(unsigned int queue) |
153 | { | 200 | { |
154 | return !!(qmgr_get_stat2(queue) & QUEUE_STAT2_OVERFLOW); | 201 | return __qmgr_get_stat2(queue) & QUEUE_STAT2_OVERFLOW; |
155 | } | 202 | } |
156 | 203 | ||
157 | #endif | 204 | #endif |