diff options
author | Krzysztof Hałasa <khc@pm.waw.pl> | 2009-11-17 12:48:23 -0500 |
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committer | Krzysztof Hałasa <khc@pm.waw.pl> | 2009-12-05 10:58:41 -0500 |
commit | 8d3fdf31dd2066533861bb57ed7df1ae1b1f5fcc (patch) | |
tree | 5186d63c67dee5454348e55cf46d31053672d67d /arch/arm/mach-ixp4xx/fsg-pci.c | |
parent | a8b7b34075f693632cd1483b817d4211c7a63257 (diff) |
IXP4xx: Introduce IXP4XX_GPIO_IRQ(n) macro and convert IXP4xx platform files.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx/fsg-pci.c')
-rw-r--r-- | arch/arm/mach-ixp4xx/fsg-pci.c | 35 |
1 files changed, 15 insertions, 20 deletions
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c index 2a1701bb3671..5a810c930624 100644 --- a/arch/arm/mach-ixp4xx/fsg-pci.c +++ b/arch/arm/mach-ixp4xx/fsg-pci.c | |||
@@ -22,40 +22,35 @@ | |||
22 | #include <asm/mach/pci.h> | 22 | #include <asm/mach/pci.h> |
23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
24 | 24 | ||
25 | #define FSG_PCI_MAX_DEV 3 | 25 | #define MAX_DEV 3 |
26 | #define FSG_PCI_IRQ_LINES 3 | 26 | #define IRQ_LINES 3 |
27 | 27 | ||
28 | /* PCI controller GPIO to IRQ pin mappings */ | 28 | /* PCI controller GPIO to IRQ pin mappings */ |
29 | #define FSG_PCI_INTA_PIN 6 | 29 | #define INTA 6 |
30 | #define FSG_PCI_INTB_PIN 7 | 30 | #define INTB 7 |
31 | #define FSG_PCI_INTC_PIN 5 | 31 | #define INTC 5 |
32 | #define IRQ_FSG_PCI_INTA IRQ_IXP4XX_GPIO6 | ||
33 | #define IRQ_FSG_PCI_INTB IRQ_IXP4XX_GPIO7 | ||
34 | #define IRQ_FSG_PCI_INTC IRQ_IXP4XX_GPIO5 | ||
35 | 32 | ||
36 | void __init fsg_pci_preinit(void) | 33 | void __init fsg_pci_preinit(void) |
37 | { | 34 | { |
38 | set_irq_type(IRQ_FSG_PCI_INTA, IRQ_TYPE_LEVEL_LOW); | 35 | set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
39 | set_irq_type(IRQ_FSG_PCI_INTB, IRQ_TYPE_LEVEL_LOW); | 36 | set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); |
40 | set_irq_type(IRQ_FSG_PCI_INTC, IRQ_TYPE_LEVEL_LOW); | 37 | set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); |
41 | |||
42 | ixp4xx_pci_preinit(); | 38 | ixp4xx_pci_preinit(); |
43 | } | 39 | } |
44 | 40 | ||
45 | static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 41 | static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
46 | { | 42 | { |
47 | static int pci_irq_table[FSG_PCI_IRQ_LINES] = { | 43 | static int pci_irq_table[IRQ_LINES] = { |
48 | IRQ_FSG_PCI_INTC, | 44 | IXP4XX_GPIO_IRQ(INTC), |
49 | IRQ_FSG_PCI_INTB, | 45 | IXP4XX_GPIO_IRQ(INTB), |
50 | IRQ_FSG_PCI_INTA, | 46 | IXP4XX_GPIO_IRQ(INTA), |
51 | }; | 47 | }; |
52 | 48 | ||
53 | int irq = -1; | 49 | int irq = -1; |
54 | slot = slot - 11; | 50 | slot -= 11; |
55 | 51 | ||
56 | if (slot >= 1 && slot <= FSG_PCI_MAX_DEV && | 52 | if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) |
57 | pin >= 1 && pin <= FSG_PCI_IRQ_LINES) | 53 | irq = pci_irq_table[slot - 1]; |
58 | irq = pci_irq_table[(slot - 1)]; | ||
59 | printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n", | 54 | printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n", |
60 | __func__, slot, pin, irq); | 55 | __func__, slot, pin, irq); |
61 | 56 | ||