[ARM] 3064/1: start using ixp2000_reg_wrb

Patch from Lennert Buytenhek

Switch the users of ixp2000_reg_write that depend on writes being
flushed out of the write buffer by the time that function returns
over to ixp2000_reg_wrb.

When using XCB=101, writes to the same functional unit are still
guaranteed to complete in order, so we only need to protect against:
- reordering of writes to different functional units
- masking an interrupt and then reenabling the IRQ bit in CPSR

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 522205acb316..d4bf1e1c0031 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -148,7 +148,7 @@ int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_re
         local_irq_save(flags);
         temp = *(IXP2000_PCI_CONTROL);
         if (temp & ((1 << 8) | (1 << 5))) {
-                ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
+                ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
         }
 
         temp = *(IXP2000_PCI_CMDSTAT);
@@ -178,8 +178,8 @@ clear_master_aborts(void)
 
         local_irq_save(flags);
         temp = *(IXP2000_PCI_CONTROL);
-        if (temp & ((1 << 8) | (1 << 5))) {     
-                ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
+        if (temp & ((1 << 8) | (1 << 5))) {
+                ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
         }
 
         temp = *(IXP2000_PCI_CMDSTAT);