diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-05 11:14:15 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 04:55:48 -0400 |
commit | a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch) | |
tree | 69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-ixp2000/include/mach/uncompress.h | |
parent | a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff) |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ixp2000/include/mach/uncompress.h')
-rw-r--r-- | arch/arm/mach-ixp2000/include/mach/uncompress.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp2000/include/mach/uncompress.h b/arch/arm/mach-ixp2000/include/mach/uncompress.h new file mode 100644 index 000000000000..ce363087df78 --- /dev/null +++ b/arch/arm/mach-ixp2000/include/mach/uncompress.h | |||
@@ -0,0 +1,47 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp2000/include/mach/uncompress.h | ||
3 | * | ||
4 | * | ||
5 | * Original Author: Naeem Afzal <naeem.m.afzal@intel.com> | ||
6 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> | ||
7 | * | ||
8 | * Copyright 2002 Intel Corp. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #include <linux/serial_reg.h> | ||
18 | |||
19 | #define UART_BASE 0xc0030000 | ||
20 | |||
21 | #define PHYS(x) ((volatile unsigned long *)(UART_BASE + x)) | ||
22 | |||
23 | #define UARTDR PHYS(0x00) /* Transmit reg dlab=0 */ | ||
24 | #define UARTDLL PHYS(0x00) /* Divisor Latch reg dlab=1*/ | ||
25 | #define UARTDLM PHYS(0x04) /* Divisor Latch reg dlab=1*/ | ||
26 | #define UARTIER PHYS(0x04) /* Interrupt enable reg */ | ||
27 | #define UARTFCR PHYS(0x08) /* FIFO control reg dlab =0*/ | ||
28 | #define UARTLCR PHYS(0x0c) /* Control reg */ | ||
29 | #define UARTSR PHYS(0x14) /* Status reg */ | ||
30 | |||
31 | |||
32 | static inline void putc(int c) | ||
33 | { | ||
34 | int j = 0x1000; | ||
35 | |||
36 | while (--j && !(*UARTSR & UART_LSR_THRE)) | ||
37 | barrier(); | ||
38 | |||
39 | *UARTDR = c; | ||
40 | } | ||
41 | |||
42 | static inline void flush(void) | ||
43 | { | ||
44 | } | ||
45 | |||
46 | #define arch_decomp_setup() | ||
47 | #define arch_decomp_wdog() | ||