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authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-18 18:24:52 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 05:25:50 -0400
commitc680b77efe4542830bb170e1cc40db1c47c569bc (patch)
treeed79bf5cb4bab39e694690747c34cee8798c6d02 /arch/arm/mach-iop33x
parent7412b10f7967ef4210ed6f793004d23642dc5140 (diff)
[ARM] 3830/1: iop3xx: board support file cleanup
Revamp the iop3xx board support: move the support code for each iop board type into its own file, start using platform serial and platform physmap flash devices, switch to a per-board time tick rate, and get rid of the ARCH_EP80219 and STEPD config options by doing the relevant checks at run time. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-iop33x')
-rw-r--r--arch/arm/mach-iop33x/Kconfig6
-rw-r--r--arch/arm/mach-iop33x/Makefile6
-rw-r--r--arch/arm/mach-iop33x/iq80331-pci.c80
-rw-r--r--arch/arm/mach-iop33x/iq80331.c148
-rw-r--r--arch/arm/mach-iop33x/iq80332-pci.c86
-rw-r--r--arch/arm/mach-iop33x/iq80332.c148
-rw-r--r--arch/arm/mach-iop33x/setup.c162
-rw-r--r--arch/arm/mach-iop33x/uart.c106
8 files changed, 405 insertions, 337 deletions
diff --git a/arch/arm/mach-iop33x/Kconfig b/arch/arm/mach-iop33x/Kconfig
index 410df546e954..9aa016bb18f9 100644
--- a/arch/arm/mach-iop33x/Kconfig
+++ b/arch/arm/mach-iop33x/Kconfig
@@ -16,12 +16,6 @@ config MACH_IQ80332
16 Say Y here if you want to run your kernel on the Intel IQ80332 16 Say Y here if you want to run your kernel on the Intel IQ80332
17 evaluation kit for the IOP332 chipset. 17 evaluation kit for the IOP332 chipset.
18 18
19config IOP331_STEPD
20 bool "Chip stepping D of the IOP80331 processor or IOP80333"
21 help
22 Say Y here if you have StepD of the IOP80331 or IOP8033
23 based platforms.
24
25endmenu 19endmenu
26 20
27endif 21endif
diff --git a/arch/arm/mach-iop33x/Makefile b/arch/arm/mach-iop33x/Makefile
index f825cee57d9f..90081d8c9d16 100644
--- a/arch/arm/mach-iop33x/Makefile
+++ b/arch/arm/mach-iop33x/Makefile
@@ -2,10 +2,10 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := setup.o irq.o 5obj-y := irq.o uart.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
9 9
10obj-$(CONFIG_ARCH_IQ80331) += iq80331-pci.o 10obj-$(CONFIG_ARCH_IQ80331) += iq80331.o
11obj-$(CONFIG_MACH_IQ80332) += iq80332-pci.o 11obj-$(CONFIG_MACH_IQ80332) += iq80332.o
diff --git a/arch/arm/mach-iop33x/iq80331-pci.c b/arch/arm/mach-iop33x/iq80331-pci.c
deleted file mode 100644
index 8b0bed5e2f91..000000000000
--- a/arch/arm/mach-iop33x/iq80331-pci.c
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * arch/arm/mach-iop33x/iq80331-pci.c
3 *
4 * PCI support for the Intel IQ80331 reference board
5 *
6 * Author: Dave Jiang <dave.jiang@intel.com>
7 * Copyright (C) 2003, 2004 Intel Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/kernel.h>
14#include <linux/pci.h>
15#include <linux/init.h>
16#include <linux/string.h>
17#include <linux/slab.h>
18
19#include <asm/hardware.h>
20#include <asm/irq.h>
21#include <asm/mach/pci.h>
22#include <asm/mach-types.h>
23
24/*
25 * The following macro is used to lookup irqs in a standard table
26 * format for those systems that do not already have PCI
27 * interrupts properly routed. We assume 1 <= pin <= 4
28 */
29#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
30({ int _ctl_ = -1; \
31 unsigned int _idsel = idsel - minid; \
32 if (_idsel <= maxid) \
33 _ctl_ = pci_irq_table[_idsel][pin-1]; \
34 _ctl_; })
35
36#define INTA IRQ_IQ80331_INTA
37#define INTB IRQ_IQ80331_INTB
38#define INTC IRQ_IQ80331_INTC
39#define INTD IRQ_IQ80331_INTD
40
41//#define INTE IRQ_IQ80331_I82544
42
43static inline int __init
44iq80331_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
45{
46 static int pci_irq_table[][4] = {
47 /*
48 * PCI IDSEL/INTPIN->INTLINE
49 * A B C D
50 */
51 {INTB, INTC, INTD, INTA}, /* PCI-X Slot */
52 {INTC, INTC, INTC, INTC}, /* GigE */
53 };
54
55 BUG_ON(pin < 1 || pin > 4);
56
57 return PCI_IRQ_TABLE_LOOKUP(1, 7);
58}
59
60static struct hw_pci iq80331_pci __initdata = {
61 .swizzle = pci_std_swizzle,
62 .nr_controllers = 1,
63 .setup = iop3xx_pci_setup,
64 .scan = iop3xx_pci_scan_bus,
65 .preinit = iop3xx_pci_preinit,
66 .map_irq = iq80331_map_irq
67};
68
69static int __init iq80331_pci_init(void)
70{
71 if (machine_is_iq80331())
72 pci_common_init(&iq80331_pci);
73 return 0;
74}
75
76subsys_initcall(iq80331_pci_init);
77
78
79
80
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
new file mode 100644
index 000000000000..6b8475da3df6
--- /dev/null
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -0,0 +1,148 @@
1/*
2 * arch/arm/mach-iop33x/iq80331.c
3 *
4 * Board support code for the Intel IQ80331 platform.
5 *
6 * Author: Dave Jiang <dave.jiang@intel.com>
7 * Copyright (C) 2003 Intel Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/mm.h>
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/pci.h>
19#include <linux/string.h>
20#include <linux/slab.h>
21#include <linux/serial_core.h>
22#include <linux/serial_8250.h>
23#include <linux/mtd/physmap.h>
24#include <linux/platform_device.h>
25#include <asm/hardware.h>
26#include <asm/io.h>
27#include <asm/irq.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/pci.h>
31#include <asm/mach/time.h>
32#include <asm/mach-types.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35
36/*
37 * IQ80331 timer tick configuration.
38 */
39static void __init iq80331_timer_init(void)
40{
41 /* D-Step parts run at a higher internal bus frequency */
42 if (*IOP3XX_ATURID >= 0xa)
43 iop3xx_init_time(333000000);
44 else
45 iop3xx_init_time(266000000);
46}
47
48static struct sys_timer iq80331_timer = {
49 .init = iq80331_timer_init,
50 .offset = iop3xx_gettimeoffset,
51};
52
53
54/*
55 * IQ80331 PCI.
56 */
57static inline int __init
58iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
59{
60 int irq;
61
62 if (slot == 1 && pin == 1) {
63 /* PCI-X Slot INTA */
64 irq = IRQ_IOP331_XINT1;
65 } else if (slot == 1 && pin == 2) {
66 /* PCI-X Slot INTB */
67 irq = IRQ_IOP331_XINT2;
68 } else if (slot == 1 && pin == 3) {
69 /* PCI-X Slot INTC */
70 irq = IRQ_IOP331_XINT3;
71 } else if (slot == 1 && pin == 4) {
72 /* PCI-X Slot INTD */
73 irq = IRQ_IOP331_XINT0;
74 } else if (slot == 2) {
75 /* GigE */
76 irq = IRQ_IOP331_XINT2;
77 } else {
78 printk(KERN_ERR "iq80331_pci_map_irq() called for unknown "
79 "device PCI:%d:%d:%d\n", dev->bus->number,
80 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
81 irq = -1;
82 }
83
84 return irq;
85}
86
87static struct hw_pci iq80331_pci __initdata = {
88 .swizzle = pci_std_swizzle,
89 .nr_controllers = 1,
90 .setup = iop3xx_pci_setup,
91 .preinit = iop3xx_pci_preinit,
92 .scan = iop3xx_pci_scan_bus,
93 .map_irq = iq80331_pci_map_irq,
94};
95
96static int __init iq80331_pci_init(void)
97{
98 if (machine_is_iq80331())
99 pci_common_init(&iq80331_pci);
100
101 return 0;
102}
103
104subsys_initcall(iq80331_pci_init);
105
106
107/*
108 * IQ80331 machine initialisation.
109 */
110static struct physmap_flash_data iq80331_flash_data = {
111 .width = 1,
112};
113
114static struct resource iq80331_flash_resource = {
115 .start = 0xc0000000,
116 .end = 0xc07fffff,
117 .flags = IORESOURCE_MEM,
118};
119
120static struct platform_device iq80331_flash_device = {
121 .name = "physmap-flash",
122 .id = 0,
123 .dev = {
124 .platform_data = &iq80331_flash_data,
125 },
126 .num_resources = 1,
127 .resource = &iq80331_flash_resource,
128};
129
130static void __init iq80331_init_machine(void)
131{
132 platform_device_register(&iop3xx_i2c0_device);
133 platform_device_register(&iop3xx_i2c1_device);
134 platform_device_register(&iop33x_uart0_device);
135 platform_device_register(&iop33x_uart1_device);
136 platform_device_register(&iq80331_flash_device);
137}
138
139MACHINE_START(IQ80331, "Intel IQ80331")
140 /* Maintainer: Intel Corp. */
141 .phys_io = 0xfefff000,
142 .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc,
143 .boot_params = 0x00000100,
144 .map_io = iop3xx_map_io,
145 .init_irq = iop331_init_irq,
146 .timer = &iq80331_timer,
147 .init_machine = iq80331_init_machine,
148MACHINE_END
diff --git a/arch/arm/mach-iop33x/iq80332-pci.c b/arch/arm/mach-iop33x/iq80332-pci.c
deleted file mode 100644
index 0de8aa748dd8..000000000000
--- a/arch/arm/mach-iop33x/iq80332-pci.c
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * arch/arm/mach-iop33x/iq80332-pci.c
3 *
4 * PCI support for the Intel IQ80332 reference board
5 *
6 * Author: Dave Jiang <dave.jiang@intel.com>
7 * Copyright (C) 2004 Intel Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/kernel.h>
14#include <linux/pci.h>
15#include <linux/init.h>
16#include <linux/string.h>
17#include <linux/slab.h>
18
19#include <asm/hardware.h>
20#include <asm/irq.h>
21#include <asm/mach/pci.h>
22#include <asm/mach-types.h>
23
24/*
25 * The following macro is used to lookup irqs in a standard table
26 * format for those systems that do not already have PCI
27 * interrupts properly routed. We assume 1 <= pin <= 4
28 */
29#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
30({ int _ctl_ = -1; \
31 unsigned int _idsel = idsel - minid; \
32 if (_idsel <= maxid) \
33 _ctl_ = pci_irq_table[_idsel][pin-1]; \
34 _ctl_; })
35
36#define INTA IRQ_IQ80332_INTA
37#define INTB IRQ_IQ80332_INTB
38#define INTC IRQ_IQ80332_INTC
39#define INTD IRQ_IQ80332_INTD
40
41//#define INTE IRQ_IQ80332_I82544
42
43static inline int __init
44iq80332_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
45{
46 static int pci_irq_table[][8] = {
47 /*
48 * PCI IDSEL/INTPIN->INTLINE
49 * A B C D
50 */
51 {-1, -1, -1, -1},
52 {-1, -1, -1, -1},
53 {-1, -1, -1, -1},
54 {INTA, INTB, INTC, INTD}, /* PCI-X Slot */
55 {-1, -1, -1, -1},
56 {INTC, INTC, INTC, INTC}, /* GigE */
57 {-1, -1, -1, -1},
58 {-1, -1, -1, -1},
59 };
60
61 BUG_ON(pin < 1 || pin > 4);
62
63 return PCI_IRQ_TABLE_LOOKUP(1, 7);
64}
65
66static struct hw_pci iq80332_pci __initdata = {
67 .swizzle = pci_std_swizzle,
68 .nr_controllers = 1,
69 .setup = iop3xx_pci_setup,
70 .scan = iop3xx_pci_scan_bus,
71 .preinit = iop3xx_pci_preinit,
72 .map_irq = iq80332_map_irq
73};
74
75static int __init iq80332_pci_init(void)
76{
77 if (machine_is_iq80332())
78 pci_common_init(&iq80332_pci);
79 return 0;
80}
81
82subsys_initcall(iq80332_pci_init);
83
84
85
86
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
new file mode 100644
index 000000000000..150f3fd5de0b
--- /dev/null
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -0,0 +1,148 @@
1/*
2 * arch/arm/mach-iop33x/iq80332.c
3 *
4 * Board support code for the Intel IQ80332 platform.
5 *
6 * Author: Dave Jiang <dave.jiang@intel.com>
7 * Copyright (C) 2004 Intel Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/mm.h>
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/pci.h>
19#include <linux/string.h>
20#include <linux/slab.h>
21#include <linux/serial_core.h>
22#include <linux/serial_8250.h>
23#include <linux/mtd/physmap.h>
24#include <linux/platform_device.h>
25#include <asm/hardware.h>
26#include <asm/io.h>
27#include <asm/irq.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/pci.h>
31#include <asm/mach/time.h>
32#include <asm/mach-types.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35
36/*
37 * IQ80332 timer tick configuration.
38 */
39static void __init iq80332_timer_init(void)
40{
41 /* D-Step parts and the iop333 run at a higher internal bus frequency */
42 if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374)
43 iop3xx_init_time(333000000);
44 else
45 iop3xx_init_time(266000000);
46}
47
48static struct sys_timer iq80332_timer = {
49 .init = iq80332_timer_init,
50 .offset = iop3xx_gettimeoffset,
51};
52
53
54/*
55 * IQ80332 PCI.
56 */
57static inline int __init
58iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
59{
60 int irq;
61
62 if (slot == 4 && pin == 1) {
63 /* PCI-X Slot INTA */
64 irq = IRQ_IOP331_XINT0;
65 } else if (slot == 4 && pin == 2) {
66 /* PCI-X Slot INTB */
67 irq = IRQ_IOP331_XINT1;
68 } else if (slot == 4 && pin == 3) {
69 /* PCI-X Slot INTC */
70 irq = IRQ_IOP331_XINT2;
71 } else if (slot == 4 && pin == 4) {
72 /* PCI-X Slot INTD */
73 irq = IRQ_IOP331_XINT3;
74 } else if (slot == 6) {
75 /* GigE */
76 irq = IRQ_IOP331_XINT2;
77 } else {
78 printk(KERN_ERR "iq80332_pci_map_irq() called for unknown "
79 "device PCI:%d:%d:%d\n", dev->bus->number,
80 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
81 irq = -1;
82 }
83
84 return irq;
85}
86
87static struct hw_pci iq80332_pci __initdata = {
88 .swizzle = pci_std_swizzle,
89 .nr_controllers = 1,
90 .setup = iop3xx_pci_setup,
91 .preinit = iop3xx_pci_preinit,
92 .scan = iop3xx_pci_scan_bus,
93 .map_irq = iq80332_pci_map_irq,
94};
95
96static int __init iq80332_pci_init(void)
97{
98 if (machine_is_iq80332())
99 pci_common_init(&iq80332_pci);
100
101 return 0;
102}
103
104subsys_initcall(iq80332_pci_init);
105
106
107/*
108 * IQ80332 machine initialisation.
109 */
110static struct physmap_flash_data iq80332_flash_data = {
111 .width = 1,
112};
113
114static struct resource iq80332_flash_resource = {
115 .start = 0xc0000000,
116 .end = 0xc07fffff,
117 .flags = IORESOURCE_MEM,
118};
119
120static struct platform_device iq80332_flash_device = {
121 .name = "physmap-flash",
122 .id = 0,
123 .dev = {
124 .platform_data = &iq80332_flash_data,
125 },
126 .num_resources = 1,
127 .resource = &iq80332_flash_resource,
128};
129
130static void __init iq80332_init_machine(void)
131{
132 platform_device_register(&iop3xx_i2c0_device);
133 platform_device_register(&iop3xx_i2c1_device);
134 platform_device_register(&iop33x_uart0_device);
135 platform_device_register(&iop33x_uart1_device);
136 platform_device_register(&iq80332_flash_device);
137}
138
139MACHINE_START(IQ80332, "Intel IQ80332")
140 /* Maintainer: Intel Corp. */
141 .phys_io = 0xfefff000,
142 .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc,
143 .boot_params = 0x00000100,
144 .map_io = iop3xx_map_io,
145 .init_irq = iop331_init_irq,
146 .timer = &iq80332_timer,
147 .init_machine = iq80332_init_machine,
148MACHINE_END
diff --git a/arch/arm/mach-iop33x/setup.c b/arch/arm/mach-iop33x/setup.c
deleted file mode 100644
index 7cf5015436f3..000000000000
--- a/arch/arm/mach-iop33x/setup.c
+++ /dev/null
@@ -1,162 +0,0 @@
1/*
2 * linux/arch/arm/mach-iop33x/setup.c
3 *
4 * Author: Dave Jiang (dave.jiang@intel.com)
5 * Copyright (C) 2004 Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12#include <linux/mm.h>
13#include <linux/init.h>
14#include <linux/major.h>
15#include <linux/fs.h>
16#include <linux/platform_device.h>
17#include <linux/serial.h>
18#include <linux/tty.h>
19#include <linux/serial_8250.h>
20
21#include <asm/io.h>
22#include <asm/pgtable.h>
23#include <asm/page.h>
24#include <asm/mach/map.h>
25#include <asm/setup.h>
26#include <asm/system.h>
27#include <asm/memory.h>
28#include <asm/hardware.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/time.h>
32#include <asm/hardware/iop3xx.h>
33
34#define IOP331_UART_XTAL 33334000
35
36static struct resource iop33x_uart0_resources[] = {
37 [0] = {
38 .start = IOP331_UART0_PHYS,
39 .end = IOP331_UART0_PHYS + 0x3f,
40 .flags = IORESOURCE_MEM,
41 },
42 [1] = {
43 .start = IRQ_IOP331_UART0,
44 .end = IRQ_IOP331_UART0,
45 .flags = IORESOURCE_IRQ
46 }
47};
48
49static struct resource iop33x_uart1_resources[] = {
50 [0] = {
51 .start = IOP331_UART1_PHYS,
52 .end = IOP331_UART1_PHYS + 0x3f,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = IRQ_IOP331_UART1,
57 .end = IRQ_IOP331_UART1,
58 .flags = IORESOURCE_IRQ
59 }
60};
61
62static struct plat_serial8250_port iop33x_uart0_data[] = {
63 {
64 .membase = (char*)(IOP331_UART0_VIRT),
65 .mapbase = (IOP331_UART0_PHYS),
66 .irq = IRQ_IOP331_UART0,
67 .uartclk = IOP331_UART_XTAL,
68 .regshift = 2,
69 .iotype = UPIO_MEM,
70 .flags = UPF_SKIP_TEST,
71 },
72 { },
73};
74
75static struct plat_serial8250_port iop33x_uart1_data[] = {
76 {
77 .membase = (char*)(IOP331_UART1_VIRT),
78 .mapbase = (IOP331_UART1_PHYS),
79 .irq = IRQ_IOP331_UART1,
80 .uartclk = IOP331_UART_XTAL,
81 .regshift = 2,
82 .iotype = UPIO_MEM,
83 .flags = UPF_SKIP_TEST,
84 },
85 { },
86};
87
88static struct platform_device iop33x_uart0 = {
89 .name = "serial8250",
90 .id = PLAT8250_DEV_PLATFORM,
91 .dev.platform_data = iop33x_uart0_data,
92 .num_resources = 2,
93 .resource = iop33x_uart0_resources,
94};
95
96static struct platform_device iop33x_uart1 = {
97 .name = "serial8250",
98 .id = PLAT8250_DEV_PLATFORM1,
99 .dev.platform_data = iop33x_uart1_data,
100 .num_resources = 2,
101 .resource = iop33x_uart1_resources,
102};
103
104static struct platform_device *iop33x_devices[] __initdata = {
105 &iop33x_uart0,
106 &iop33x_uart1,
107};
108
109void __init iop33x_init(void)
110{
111 if(iop_is_331())
112 {
113 platform_add_devices(iop33x_devices,
114 ARRAY_SIZE(iop33x_devices));
115 }
116 platform_device_register(&iop3xx_i2c0_device);
117 platform_device_register(&iop3xx_i2c1_device);
118}
119
120#ifdef CONFIG_ARCH_IOP33X
121extern void iop331_init_irq(void);
122#endif
123
124static void __init iop3xx_timer_init(void)
125{
126 iop3xx_init_time(IOP331_TICK_RATE);
127}
128
129struct sys_timer iop331_timer = {
130 .init = iop3xx_timer_init,
131 .offset = iop3xx_gettimeoffset,
132};
133
134#if defined(CONFIG_ARCH_IQ80331)
135MACHINE_START(IQ80331, "Intel IQ80331")
136 /* Maintainer: Intel Corp. */
137 .phys_io = 0xfefff000,
138 .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
139 .map_io = iop3xx_map_io,
140 .init_irq = iop331_init_irq,
141 .timer = &iop331_timer,
142 .boot_params = 0x0100,
143 .init_machine = iop33x_init,
144MACHINE_END
145
146#elif defined(CONFIG_MACH_IQ80332)
147MACHINE_START(IQ80332, "Intel IQ80332")
148 /* Maintainer: Intel Corp. */
149 .phys_io = 0xfefff000,
150 .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
151 .map_io = iop3xx_map_io,
152 .init_irq = iop331_init_irq,
153 .timer = &iop331_timer,
154 .boot_params = 0x0100,
155 .init_machine = iop33x_init,
156MACHINE_END
157
158#else
159#error No machine descriptor defined for this IOP3XX implementation
160#endif
161
162
diff --git a/arch/arm/mach-iop33x/uart.c b/arch/arm/mach-iop33x/uart.c
new file mode 100644
index 000000000000..d221d4abaa87
--- /dev/null
+++ b/arch/arm/mach-iop33x/uart.c
@@ -0,0 +1,106 @@
1/*
2 * linux/arch/arm/mach-iop33x/uart.c
3 *
4 * Author: Dave Jiang (dave.jiang@intel.com)
5 * Copyright (C) 2004 Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/mm.h>
13#include <linux/init.h>
14#include <linux/major.h>
15#include <linux/fs.h>
16#include <linux/platform_device.h>
17#include <linux/serial.h>
18#include <linux/tty.h>
19#include <linux/serial_8250.h>
20
21#include <asm/io.h>
22#include <asm/pgtable.h>
23#include <asm/page.h>
24#include <asm/mach/map.h>
25#include <asm/setup.h>
26#include <asm/system.h>
27#include <asm/memory.h>
28#include <asm/hardware.h>
29#include <asm/hardware/iop3xx.h>
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32
33#define IOP331_UART_XTAL 33334000
34
35static struct plat_serial8250_port iop33x_uart0_data[] = {
36 {
37 .membase = (char *)IOP331_UART0_VIRT,
38 .mapbase = IOP331_UART0_PHYS,
39 .irq = IRQ_IOP331_UART0,
40 .uartclk = IOP331_UART_XTAL,
41 .regshift = 2,
42 .iotype = UPIO_MEM,
43 .flags = UPF_SKIP_TEST,
44 },
45 { },
46};
47
48static struct resource iop33x_uart0_resources[] = {
49 [0] = {
50 .start = IOP331_UART0_PHYS,
51 .end = IOP331_UART0_PHYS + 0x3f,
52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = IRQ_IOP331_UART0,
56 .end = IRQ_IOP331_UART0,
57 .flags = IORESOURCE_IRQ,
58 },
59};
60
61struct platform_device iop33x_uart0_device = {
62 .name = "serial8250",
63 .id = PLAT8250_DEV_PLATFORM,
64 .dev = {
65 .platform_data = iop33x_uart0_data,
66 },
67 .num_resources = 2,
68 .resource = iop33x_uart0_resources,
69};
70
71
72static struct resource iop33x_uart1_resources[] = {
73 [0] = {
74 .start = IOP331_UART1_PHYS,
75 .end = IOP331_UART1_PHYS + 0x3f,
76 .flags = IORESOURCE_MEM,
77 },
78 [1] = {
79 .start = IRQ_IOP331_UART1,
80 .end = IRQ_IOP331_UART1,
81 .flags = IORESOURCE_IRQ,
82 },
83};
84
85static struct plat_serial8250_port iop33x_uart1_data[] = {
86 {
87 .membase = (char *)IOP331_UART1_VIRT,
88 .mapbase = IOP331_UART1_PHYS,
89 .irq = IRQ_IOP331_UART1,
90 .uartclk = IOP331_UART_XTAL,
91 .regshift = 2,
92 .iotype = UPIO_MEM,
93 .flags = UPF_SKIP_TEST,
94 },
95 { },
96};
97
98struct platform_device iop33x_uart1_device = {
99 .name = "serial8250",
100 .id = PLAT8250_DEV_PLATFORM1,
101 .dev = {
102 .platform_data = iop33x_uart1_data,
103 },
104 .num_resources = 2,
105 .resource = iop33x_uart1_resources,
106};
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-03 23:19:03 -0400