[ARM] 3821/1: iop3xx: switch iop32x/iop33x over to shared pci code

Switch the iop32x and iop33x code over to the common PCI implementation,
and remove the (nearly identical) iop32x and iop33x PCI implementations.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

6 files changed, 8 insertions, 312 deletions

diff --git a/arch/arm/mach-iop32x/Makefile b/arch/arm/mach-iop32x/Makefile
index 94144f7efa6c..7266224ab6d7 100644
--- a/arch/arm/mach-iop32x/Makefile
+++ b/arch/arm/mach-iop32x/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the linux kernel.
 #
 
-obj-y                   := common.o setup.o irq.o pci.o time.o
+obj-y                   := common.o setup.o irq.o time.o
 obj-m                   :=
 obj-n                   :=
 obj-                    :=
diff --git a/arch/arm/mach-iop32x/common.c b/arch/arm/mach-iop32x/common.c
index 17e7d650fecb..9a17a081327d 100644
--- a/arch/arm/mach-iop32x/common.c
+++ b/arch/arm/mach-iop32x/common.c
@@ -16,12 +16,6 @@
 #include <asm/hardware.h>
 #include <asm/hardware/iop3xx.h>
 
-/*
- * Shared variables
- */
-unsigned long iop3xx_pcibios_min_io = 0;
-unsigned long iop3xx_pcibios_min_mem = 0;
-
 #ifdef CONFIG_ARCH_EP80219
 #include <linux/kernel.h>
 /*
diff --git a/arch/arm/mach-iop32x/iq31244-pci.c b/arch/arm/mach-iop32x/iq31244-pci.c
index e447c8103ecd..605b79553747 100644
--- a/arch/arm/mach-iop32x/iq31244-pci.c
+++ b/arch/arm/mach-iop32x/iq31244-pci.c
@@ -67,51 +67,12 @@ iq31244_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
         return PCI_IRQ_TABLE_LOOKUP(0, 7);
 }
 
-static int iq31244_setup(int nr, struct pci_sys_data *sys)
-{
-        struct resource *res;
-
-        if(nr != 0)
-                return 0;
-
-        res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
-        if (!res)
-                panic("PCI: unable to alloc resources");
-
-        res[0].start = IOP321_PCI_LOWER_IO_VA;
-        res[0].end   = IOP321_PCI_UPPER_IO_VA;
-        res[0].name  = "IQ31244 PCI I/O Space";
-        res[0].flags = IORESOURCE_IO;
-
-        res[1].start = IOP321_PCI_LOWER_MEM_PA;
-        res[1].end   = IOP321_PCI_UPPER_MEM_PA;
-        res[1].name  = "IQ31244 PCI Memory Space";
-        res[1].flags = IORESOURCE_MEM;
-
-        request_resource(&ioport_resource, &res[0]);
-        request_resource(&iomem_resource, &res[1]);
-
-        sys->mem_offset = IOP321_PCI_MEM_OFFSET;
-        sys->io_offset  = IOP321_PCI_IO_OFFSET;
-
-        sys->resource[0] = &res[0];
-        sys->resource[1] = &res[1];
-        sys->resource[2] = NULL;
-
-        return 1;
-}
-
-static void iq31244_preinit(void)
-{
-        iop321_init();
-}
-
 static struct hw_pci iq31244_pci __initdata = {
         .swizzle        = pci_std_swizzle,
         .nr_controllers = 1,
-        .setup          = iq31244_setup,
-        .scan           = iop321_scan_bus,
-        .preinit        = iq31244_preinit,
+        .setup          = iop3xx_pci_setup,
+        .scan           = iop3xx_pci_scan_bus,
+        .preinit        = iop3xx_pci_preinit,
         .map_irq        = iq31244_map_irq
 };
 
diff --git a/arch/arm/mach-iop32x/iq80321-pci.c b/arch/arm/mach-iop32x/iq80321-pci.c
index 8767950e131f..cedc37b968b7 100644
--- a/arch/arm/mach-iop32x/iq80321-pci.c
+++ b/arch/arm/mach-iop32x/iq80321-pci.c
@@ -61,51 +61,12 @@ iq80321_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
         return pci_irq_table[idsel%4][pin-1];
 }
 
-static int iq80321_setup(int nr, struct pci_sys_data *sys)
-{
-        struct resource *res;
-
-        if(nr != 0)
-                return 0;
-
-        res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
-        if (!res)
-                panic("PCI: unable to alloc resources");
-
-        res[0].start = IOP321_PCI_LOWER_IO_VA;
-        res[0].end   = IOP321_PCI_UPPER_IO_VA;
-        res[0].name  = "IQ80321 PCI I/O Space";
-        res[0].flags = IORESOURCE_IO;
-
-        res[1].start = IOP321_PCI_LOWER_MEM_PA;
-        res[1].end   = IOP321_PCI_UPPER_MEM_PA;
-        res[1].name  = "IQ80321 PCI Memory Space";
-        res[1].flags = IORESOURCE_MEM;
-
-        request_resource(&ioport_resource, &res[0]);
-        request_resource(&iomem_resource, &res[1]);
-
-        sys->mem_offset = IOP321_PCI_MEM_OFFSET;
-        sys->io_offset  = IOP321_PCI_IO_OFFSET;
-
-        sys->resource[0] = &res[0];
-        sys->resource[1] = &res[1];
-        sys->resource[2] = NULL;
-
-        return 1;
-}
-
-static void iq80321_preinit(void)
-{
-        iop321_init();
-}
-
 static struct hw_pci iq80321_pci __initdata = {
         .swizzle        = pci_std_swizzle,
         .nr_controllers = 1,
-        .setup          = iq80321_setup,
-        .scan           = iop321_scan_bus,
-        .preinit        = iq80321_preinit,
+        .setup          = iop3xx_pci_setup,
+        .scan           = iop3xx_pci_scan_bus,
+        .preinit        = iop3xx_pci_preinit,
         .map_irq        = iq80321_map_irq
 };
 
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index c5f633d2d632..76f2d561dbc1 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -84,7 +84,7 @@ void __init iop321_init_irq(void)
         intstr_write(0);                // treat all as IRQ
         if(machine_is_iq80321() ||
            machine_is_iq31244())        // all interrupts are inputs to chip
-                *IOP321_PCIIRSR = 0x0f;
+                *IOP3XX_PCIIRSR = 0x0f;
 
         for(i = IOP321_IRQ_OFS; i < NR_IRQS; i++)
         {
diff --git a/arch/arm/mach-iop32x/pci.c b/arch/arm/mach-iop32x/pci.c
deleted file mode 100644
index 1a7c683673f2..000000000000
--- a/arch/arm/mach-iop32x/pci.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * arch/arm/mach-iop32x/pci.c
- *
- * PCI support for the Intel IOP321 chipset
- *
- * Author: Rory Bolt <rorybolt@pacbell.net>
- * Copyright (C) 2002 Rory Bolt
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/hardware.h>
-#include <asm/mach/pci.h>
-
-#include <asm/arch/iop321.h>
-
-// #define DEBUG
-
-#ifdef DEBUG
-#define  DBG(x...) printk(x)
-#else
-#define  DBG(x...) do { } while (0)
-#endif
-
-/*
- * This routine builds either a type0 or type1 configuration command.  If the
- * bus is on the 80321 then a type0 made, else a type1 is created.
- */
-static u32 iop321_cfg_address(struct pci_bus *bus, int devfn, int where)
-{
-        struct pci_sys_data *sys = bus->sysdata;
-        u32 addr;
-
-        if (sys->busnr == bus->number)
-                addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11);
-        else
-                addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1;
-
-        addr |= PCI_FUNC(devfn) << 8 | (where & ~3);
-
-        return addr;
-}
-
-/*
- * This routine checks the status of the last configuration cycle.  If an error
- * was detected it returns a 1, else it returns a 0.  The errors being checked
- * are parity, master abort, target abort (master and target).  These types of
- * errors occure during a config cycle where there is no device, like during
- * the discovery stage.
- */
-static int iop321_pci_status(void)
-{
-        unsigned int status;
-        int ret = 0;
-
-        /*
-         * Check the status registers.
-         */
-        status = *IOP321_ATUSR;
-        if (status & 0xf900)
-        {
-                DBG("\t\t\tPCI: P0 - status = 0x%08x\n", status);
-                *IOP321_ATUSR = status & 0xf900;
-                ret = 1;
-        }
-        status = *IOP321_ATUISR;
-        if (status & 0x679f)
-        {
-                DBG("\t\t\tPCI: P1 - status = 0x%08x\n", status);
-                *IOP321_ATUISR = status & 0x679f;
-                ret = 1;
-        }
-        return ret;
-}
-
-/*
- * Simply write the address register and read the configuration
- * data.  Note that the 4 nop's ensure that we are able to handle
- * a delayed abort (in theory.)
- */
-static inline u32 iop321_read(unsigned long addr)
-{
-        u32 val;
-
-        __asm__ __volatile__(
-                "str    %1, [%2]\n\t"
-                "ldr    %0, [%3]\n\t"
-                "nop\n\t"
-                "nop\n\t"
-                "nop\n\t"
-                "nop\n\t"
-                : "=r" (val)
-                : "r" (addr), "r" (IOP321_OCCAR), "r" (IOP321_OCCDR));
-
-        return val;
-}
-
-/*
- * The read routines must check the error status of the last configuration
- * cycle.  If there was an error, the routine returns all hex f's.
- */
-static int
-iop321_read_config(struct pci_bus *bus, unsigned int devfn, int where,
-                int size, u32 *value)
-{
-        unsigned long addr = iop321_cfg_address(bus, devfn, where);
-        u32 val = iop321_read(addr) >> ((where & 3) * 8);
-
-        if( iop321_pci_status() )
-                val = 0xffffffff;
-
-        *value = val;
-
-        return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-iop321_write_config(struct pci_bus *bus, unsigned int devfn, int where,
-                int size, u32 value)
-{
-        unsigned long addr = iop321_cfg_address(bus, devfn, where);
-        u32 val;
-
-        if (size != 4) {
-                val = iop321_read(addr);
-                if (!iop321_pci_status() == 0)
-                        return PCIBIOS_SUCCESSFUL;
-
-                where = (where & 3) * 8;
-
-                if (size == 1)
-                        val &= ~(0xff << where);
-                else
-                        val &= ~(0xffff << where);
-
-                *IOP321_OCCDR = val | value << where;
-        } else {
-                asm volatile(
-                        "str    %1, [%2]\n\t"
-                        "str    %0, [%3]\n\t"
-                        "nop\n\t"
-                        "nop\n\t"
-                        "nop\n\t"
-                        "nop\n\t"
-                        :
-                        : "r" (value), "r" (addr),
-                          "r" (IOP321_OCCAR), "r" (IOP321_OCCDR));
-        }
-
-        return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops iop321_ops = {
-        .read   = iop321_read_config,
-        .write  = iop321_write_config,
-};
-
-/*
- * When a PCI device does not exist during config cycles, the 80200 gets a
- * bus error instead of returning 0xffffffff. This handler simply returns.
- */
-int
-iop321_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
-{
-        DBG("PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx\n",
-                addr, fsr, regs->ARM_pc, regs->ARM_lr);
-
-        /*
-         * If it was an imprecise abort, then we need to correct the
-         * return address to be _after_ the instruction.
-         */
-        if (fsr & (1 << 10))
-                regs->ARM_pc += 4;
-
-        return 0;
-}
-
-/*
- * Scan an IOP321 PCI bus.  sys->bus defines which bus we scan.
- */
-struct pci_bus *iop321_scan_bus(int nr, struct pci_sys_data *sys)
-{
-        return pci_scan_bus(sys->busnr, &iop321_ops, sys);
-}
-
-void iop321_init(void)
-{
-        DBG("PCI:  Intel 80321 PCI init code.\n");
-        DBG("ATU: IOP321_ATUCMD=0x%04x\n", *IOP321_ATUCMD);
-        DBG("ATU: IOP321_OMWTVR0=0x%04x, IOP321_OIOWTVR=0x%04x\n",
-                        *IOP321_OMWTVR0,
-                        *IOP321_OIOWTVR);
-        DBG("ATU: IOP321_ATUCR=0x%08x\n", *IOP321_ATUCR);
-        DBG("ATU: IOP321_IABAR0=0x%08x IOP321_IALR0=0x%08x IOP321_IATVR0=%08x\n",
-                        *IOP321_IABAR0, *IOP321_IALR0, *IOP321_IATVR0);
-        DBG("ATU: IOP321_OMWTVR0=0x%08x\n", *IOP321_OMWTVR0);
-        DBG("ATU: IOP321_IABAR1=0x%08x IOP321_IALR1=0x%08x\n",
-                        *IOP321_IABAR1, *IOP321_IALR1);
-        DBG("ATU: IOP321_ERBAR=0x%08x IOP321_ERLR=0x%08x IOP321_ERTVR=%08x\n",
-                        *IOP321_ERBAR, *IOP321_ERLR, *IOP321_ERTVR);
-        DBG("ATU: IOP321_IABAR2=0x%08x IOP321_IALR2=0x%08x IOP321_IATVR2=%08x\n",
-                        *IOP321_IABAR2, *IOP321_IALR2, *IOP321_IATVR2);
-        DBG("ATU: IOP321_IABAR3=0x%08x IOP321_IALR3=0x%08x IOP321_IATVR3=%08x\n",
-                        *IOP321_IABAR3, *IOP321_IALR3, *IOP321_IATVR3);
-
-        hook_fault_code(16+6, iop321_pci_abort, SIGBUS, "imprecise external abort");
-}
-