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authorDan Williams <dan.j.williams@intel.com>2007-02-13 11:13:04 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-17 10:04:53 -0500
commit4434c5c7fd61c6713de882a2272b66f32fe7cac3 (patch)
treef20c9c4eba18dd915f07185cee5ededf33e28c02 /arch/arm/mach-iop32x/irq.c
parentf80dff9da07d81da16e3b842118d47b9febf9c01 (diff)
[ARM] 4186/1: iop: remove cp6_enable/disable routines
This functionality is replaced by cp6_trap Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-iop32x/irq.c')
-rw-r--r--arch/arm/mach-iop32x/irq.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index 8b0ac5590ae4..82598dc18d80 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -23,16 +23,12 @@ static u32 iop32x_mask;
23 23
24static inline void intctl_write(u32 val) 24static inline void intctl_write(u32 val)
25{ 25{
26 iop3xx_cp6_enable();
27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); 26 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
28 iop3xx_cp6_disable();
29} 27}
30 28
31static inline void intstr_write(u32 val) 29static inline void intstr_write(u32 val)
32{ 30{
33 iop3xx_cp6_enable();
34 asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); 31 asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));
35 iop3xx_cp6_disable();
36} 32}
37 33
38static void 34static void