aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-iop32x/iq80321.c
diff options
context:
space:
mode:
authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-18 18:24:52 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 05:25:50 -0400
commitc680b77efe4542830bb170e1cc40db1c47c569bc (patch)
treeed79bf5cb4bab39e694690747c34cee8798c6d02 /arch/arm/mach-iop32x/iq80321.c
parent7412b10f7967ef4210ed6f793004d23642dc5140 (diff)
[ARM] 3830/1: iop3xx: board support file cleanup
Revamp the iop3xx board support: move the support code for each iop board type into its own file, start using platform serial and platform physmap flash devices, switch to a per-board time tick rate, and get rid of the ARCH_EP80219 and STEPD config options by doing the relevant checks at run time. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-iop32x/iq80321.c')
-rw-r--r--arch/arm/mach-iop32x/iq80321.c193
1 files changed, 193 insertions, 0 deletions
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
new file mode 100644
index 000000000000..3c9b86271759
--- /dev/null
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -0,0 +1,193 @@
1/*
2 * arch/arm/mach-iop32x/iq80321.c
3 *
4 * Board support code for the Intel IQ80321 platform.
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright (C) 2004 Intel Corp.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/mm.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/string.h>
21#include <linux/slab.h>
22#include <linux/serial_core.h>
23#include <linux/serial_8250.h>
24#include <linux/mtd/physmap.h>
25#include <linux/platform_device.h>
26#include <asm/hardware.h>
27#include <asm/io.h>
28#include <asm/irq.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/pci.h>
32#include <asm/mach/time.h>
33#include <asm/mach-types.h>
34#include <asm/page.h>
35#include <asm/pgtable.h>
36
37/*
38 * IQ80321 timer tick configuration.
39 */
40static void __init iq80321_timer_init(void)
41{
42 /* 33.333 MHz crystal. */
43 iop3xx_init_time(200000000);
44}
45
46static struct sys_timer iq80321_timer = {
47 .init = iq80321_timer_init,
48 .offset = iop3xx_gettimeoffset,
49};
50
51
52/*
53 * IQ80321 I/O.
54 */
55static struct map_desc iq80321_io_desc[] __initdata = {
56 { /* on-board devices */
57 .virtual = IQ80321_UART,
58 .pfn = __phys_to_pfn(IQ80321_UART),
59 .length = 0x00100000,
60 .type = MT_DEVICE,
61 },
62};
63
64void __init iq80321_map_io(void)
65{
66 iop3xx_map_io();
67 iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
68}
69
70
71/*
72 * IQ80321 PCI.
73 */
74static inline int __init
75iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
76{
77 int irq;
78
79 if ((slot == 2 || slot == 6) && pin == 1) {
80 /* PCI-X Slot INTA */
81 irq = IRQ_IOP321_XINT2;
82 } else if ((slot == 2 || slot == 6) && pin == 2) {
83 /* PCI-X Slot INTA */
84 irq = IRQ_IOP321_XINT3;
85 } else if ((slot == 2 || slot == 6) && pin == 3) {
86 /* PCI-X Slot INTA */
87 irq = IRQ_IOP321_XINT0;
88 } else if ((slot == 2 || slot == 6) && pin == 4) {
89 /* PCI-X Slot INTA */
90 irq = IRQ_IOP321_XINT1;
91 } else if (slot == 4 || slot == 8) {
92 /* Gig-E */
93 irq = IRQ_IOP321_XINT0;
94 } else {
95 printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
96 "device PCI:%d:%d:%d\n", dev->bus->number,
97 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
98 irq = -1;
99 }
100
101 return irq;
102}
103
104static struct hw_pci iq80321_pci __initdata = {
105 .swizzle = pci_std_swizzle,
106 .nr_controllers = 1,
107 .setup = iop3xx_pci_setup,
108 .preinit = iop3xx_pci_preinit,
109 .scan = iop3xx_pci_scan_bus,
110 .map_irq = iq80321_pci_map_irq,
111};
112
113static int __init iq80321_pci_init(void)
114{
115 if (machine_is_iq80321())
116 pci_common_init(&iq80321_pci);
117
118 return 0;
119}
120
121subsys_initcall(iq80321_pci_init);
122
123
124/*
125 * IQ80321 machine initialisation.
126 */
127static struct physmap_flash_data iq80321_flash_data = {
128 .width = 1,
129};
130
131static struct resource iq80321_flash_resource = {
132 .start = 0xf0000000,
133 .end = 0xf07fffff,
134 .flags = IORESOURCE_MEM,
135};
136
137static struct platform_device iq80321_flash_device = {
138 .name = "physmap-flash",
139 .id = 0,
140 .dev = {
141 .platform_data = &iq80321_flash_data,
142 },
143 .num_resources = 1,
144 .resource = &iq80321_flash_resource,
145};
146
147static struct plat_serial8250_port iq80321_serial_port[] = {
148 {
149 .mapbase = IQ80321_UART,
150 .membase = (char *)IQ80321_UART,
151 .irq = IRQ_IOP321_XINT1,
152 .flags = UPF_SKIP_TEST,
153 .iotype = UPIO_MEM,
154 .regshift = 0,
155 .uartclk = 1843200,
156 },
157 { },
158};
159
160static struct resource iq80321_uart_resource = {
161 .start = IQ80321_UART,
162 .end = IQ80321_UART + 7,
163 .flags = IORESOURCE_MEM,
164};
165
166static struct platform_device iq80321_serial_device = {
167 .name = "serial8250",
168 .id = PLAT8250_DEV_PLATFORM,
169 .dev = {
170 .platform_data = iq80321_serial_port,
171 },
172 .num_resources = 1,
173 .resource = &iq80321_uart_resource,
174};
175
176static void __init iq80321_init_machine(void)
177{
178 platform_device_register(&iop3xx_i2c0_device);
179 platform_device_register(&iop3xx_i2c1_device);
180 platform_device_register(&iq80321_flash_device);
181 platform_device_register(&iq80321_serial_device);
182}
183
184MACHINE_START(IQ80321, "Intel IQ80321")
185 /* Maintainer: Intel Corp. */
186 .phys_io = IQ80321_UART,
187 .io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
188 .boot_params = 0xa0000100,
189 .map_io = iq80321_map_io,
190 .init_irq = iop321_init_irq,
191 .timer = &iq80321_timer,
192 .init_machine = iq80321_init_machine,
193MACHINE_END