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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-05 08:25:15 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-05 08:25:27 -0500
commit7b9dd47136c07ffd883aff6926c7b281e4c1eea4 (patch)
treeb835312e76fe323de3e1cbbb0d15fca5a3f7ef9c /arch/arm/mach-iop13xx
parent2e0e943436912ffe0848ece58167edfe754edb96 (diff)
parent0575fb754dbfc32a01f297e778533340a533ec68 (diff)
Merge branch 'restart' into for-linus
Conflicts: arch/arm/mach-exynos/cpu.c The changes to arch/arm/mach-exynos/cpu.c were moved to mach-exynos/common.c.
Diffstat (limited to 'arch/arm/mach-iop13xx')
-rw-r--r--arch/arm/mach-iop13xx/include/mach/iop13xx.h1
-rw-r--r--arch/arm/mach-iop13xx/include/mach/system.h14
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c1
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c1
-rw-r--r--arch/arm/mach-iop13xx/setup.c11
5 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 52b7fab7ef60..07e9ff7adafb 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -10,6 +10,7 @@ void iop13xx_map_io(void);
10void iop13xx_platform_init(void); 10void iop13xx_platform_init(void);
11void iop13xx_add_tpmi_devices(void); 11void iop13xx_add_tpmi_devices(void);
12void iop13xx_init_irq(void); 12void iop13xx_init_irq(void);
13void iop13xx_restart(char, const char *);
13 14
14/* CPUID CP6 R0 Page 0 */ 15/* CPUID CP6 R0 Page 0 */
15static inline int iop13xx_cpu_id(void) 16static inline int iop13xx_cpu_id(void)
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
index d0c66ef450a7..1f31ed3f8ae2 100644
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ b/arch/arm/mach-iop13xx/include/mach/system.h
@@ -7,21 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <mach/iop13xx.h>
11static inline void arch_idle(void) 10static inline void arch_idle(void)
12{ 11{
13 cpu_do_idle(); 12 cpu_do_idle();
14} 13}
15
16static inline void arch_reset(char mode, const char *cmd)
17{
18 /*
19 * Reset the internal bus (warning both cores are reset)
20 */
21 write_wdtcr(IOP_WDTCR_EN_ARM);
22 write_wdtcr(IOP_WDTCR_EN);
23 write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
24 write_wdtcr(0x1000);
25
26 for(;;);
27}
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 4cf2cc477eae..abaee8833588 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -96,4 +96,5 @@ MACHINE_START(IQ81340MC, "Intel IQ81340MC")
96 .init_irq = iop13xx_init_irq, 96 .init_irq = iop13xx_init_irq,
97 .timer = &iq81340mc_timer, 97 .timer = &iq81340mc_timer,
98 .init_machine = iq81340mc_init, 98 .init_machine = iq81340mc_init,
99 .restart = iop13xx_restart,
99MACHINE_END 100MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index cd9e27499a1e..690916a09dc6 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -98,4 +98,5 @@ MACHINE_START(IQ81340SC, "Intel IQ81340SC")
98 .init_irq = iop13xx_init_irq, 98 .init_irq = iop13xx_init_irq,
99 .timer = &iq81340sc_timer, 99 .timer = &iq81340sc_timer,
100 .init_machine = iq81340sc_init, 100 .init_machine = iq81340sc_init,
101 .restart = iop13xx_restart,
101MACHINE_END 102MACHINE_END
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index a5b989728b9e..daabb1fa6c2c 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -606,3 +606,14 @@ static int __init iop13xx_init_adma_setup(char *str)
606__setup("iop13xx_init_adma", iop13xx_init_adma_setup); 606__setup("iop13xx_init_adma", iop13xx_init_adma_setup);
607__setup("iop13xx_init_uart", iop13xx_init_uart_setup); 607__setup("iop13xx_init_uart", iop13xx_init_uart_setup);
608__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup); 608__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
609
610void iop13xx_restart(char mode, const char *cmd)
611{
612 /*
613 * Reset the internal bus (warning both cores are reset)
614 */
615 write_wdtcr(IOP_WDTCR_EN_ARM);
616 write_wdtcr(IOP_WDTCR_EN);
617 write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
618 write_wdtcr(0x1000);
619}