diff options
author | Daniel Wolstenholme <daniel.e.wolstenholme@intel.com> | 2007-05-11 01:33:02 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-11 12:41:52 -0400 |
commit | 2fd0237538480c8d704c385b6f9abc3f6c46b760 (patch) | |
tree | 4f4052fb01ec00d4717bc7741602e02aa9833ef6 /arch/arm/mach-iop13xx/irq.c | |
parent | 87b247c41674e29f90bf4938799ab079951ccc6b (diff) |
[ARM] iop13xx: msi support
Enable devices to signal interrupts via PCI memory cycles.
rev6:
* fix enable/disable typo, Michael Ellerman
rev5:
* fix up ack, enable, and disable for iop13xx_msi_chip
rev4:
* move smp compile fix to separate patch
* use dynamic_irq_init in create_irq()
* hookup mask/unmask routines in iop13xx_msi_chip
rev3:
* change msi.c to use linux/smp.h instead of asm/smp.h
* call dynamic_irq_cleanup at destroy_irq time
rev2:
* destroy_irq did not take the full 128 bits of msi_irq_in_use into account
* added missing '&' for calls to test_and_set_bit and clear_bit
[ebiederm@xmission.com: review comments/suggestions]
[dan.j.williams@intel.com: cleanups/forward port to 2.6-git]
Signed-off-by: Daniel Wolstenholme <daniel.e.wolstenholme@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-iop13xx/irq.c')
-rw-r--r-- | arch/arm/mach-iop13xx/irq.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index b2eb0b961031..5791addd436b 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/hardware.h> | 26 | #include <asm/hardware.h> |
27 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
28 | #include <asm/arch/irqs.h> | 28 | #include <asm/arch/irqs.h> |
29 | #include <asm/arch/msi.h> | ||
29 | 30 | ||
30 | /* INTCTL0 CP6 R0 Page 4 | 31 | /* INTCTL0 CP6 R0 Page 4 |
31 | */ | 32 | */ |
@@ -258,7 +259,7 @@ void __init iop13xx_init_irq(void) | |||
258 | write_intbase(INTBASE); | 259 | write_intbase(INTBASE); |
259 | write_intsize(INTSIZE_4); | 260 | write_intsize(INTSIZE_4); |
260 | 261 | ||
261 | for(i = 0; i < NR_IOP13XX_IRQS; i++) { | 262 | for(i = 0; i <= IRQ_IOP13XX_HPI; i++) { |
262 | if (i < 32) | 263 | if (i < 32) |
263 | set_irq_chip(i, &iop13xx_irqchip1); | 264 | set_irq_chip(i, &iop13xx_irqchip1); |
264 | else if (i < 64) | 265 | else if (i < 64) |
@@ -271,4 +272,6 @@ void __init iop13xx_init_irq(void) | |||
271 | set_irq_handler(i, handle_level_irq); | 272 | set_irq_handler(i, handle_level_irq); |
272 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 273 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
273 | } | 274 | } |
275 | |||
276 | iop13xx_msi_init(); | ||
274 | } | 277 | } |