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authorCatalin Marinas <catalin.marinas@arm.com>2009-07-24 07:34:57 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2009-07-24 07:34:57 -0400
commit365f7a43497dfdfdc05ca03896a8e22ee6944179 (patch)
tree4feeaf5d5424af24fa83fd248384ff09c0c48f34 /arch/arm/mach-integrator
parent9a45f026bb3ba720765d46f62f5c464d3317a8ab (diff)
nommu: Add MMU-less support for Integrator platforms
This patch redefines the IO_ADDRESS macro in include/asm-arm/hardware.h. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mach-integrator')
-rw-r--r--arch/arm/mach-integrator/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c16
2 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h
index 1251319ef9ae..d795642fad22 100644
--- a/arch/arm/mach-integrator/include/mach/hardware.h
+++ b/arch/arm/mach-integrator/include/mach/hardware.h
@@ -36,8 +36,12 @@
36#define PCIO_BASE PCI_IO_VADDR 36#define PCIO_BASE PCI_IO_VADDR
37#define PCIMEM_BASE PCI_MEMORY_VADDR 37#define PCIMEM_BASE PCI_MEMORY_VADDR
38 38
39#ifdef CONFIG_MMU
39/* macro to get at IO space when running virtually */ 40/* macro to get at IO space when running virtually */
40#define IO_ADDRESS(x) (((x) >> 4) + IO_BASE) 41#define IO_ADDRESS(x) (((x) >> 4) + IO_BASE)
42#else
43#define IO_ADDRESS(x) (x)
44#endif
41 45
42#define pcibios_assign_all_busses() 1 46#define pcibios_assign_all_busses() 1
43 47
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 4ac04055c2ea..452931b2690e 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -49,14 +49,14 @@
49 49
50#define INTCP_PA_CLCD_BASE 0xc0000000 50#define INTCP_PA_CLCD_BASE 0xc0000000
51 51
52#define INTCP_VA_CIC_BASE 0xf1000040 52#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE) + 0x40
53#define INTCP_VA_PIC_BASE 0xf1400000 53#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
54#define INTCP_VA_SIC_BASE 0xfca00000 54#define INTCP_VA_SIC_BASE IO_ADDRESS(0xca000000)
55 55
56#define INTCP_PA_ETH_BASE 0xc8000000 56#define INTCP_PA_ETH_BASE 0xc8000000
57#define INTCP_ETH_SIZE 0x10 57#define INTCP_ETH_SIZE 0x10
58 58
59#define INTCP_VA_CTRL_BASE 0xfcb00000 59#define INTCP_VA_CTRL_BASE IO_ADDRESS(0xcb000000)
60#define INTCP_FLASHPROG 0x04 60#define INTCP_FLASHPROG 0x04
61#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) 61#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0)
62#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) 62#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1)
@@ -121,12 +121,12 @@ static struct map_desc intcp_io_desc[] __initdata = {
121 .length = SZ_4K, 121 .length = SZ_4K,
122 .type = MT_DEVICE 122 .type = MT_DEVICE
123 }, { 123 }, {
124 .virtual = 0xfca00000, 124 .virtual = IO_ADDRESS(0xca000000),
125 .pfn = __phys_to_pfn(0xca000000), 125 .pfn = __phys_to_pfn(0xca000000),
126 .length = SZ_4K, 126 .length = SZ_4K,
127 .type = MT_DEVICE 127 .type = MT_DEVICE
128 }, { 128 }, {
129 .virtual = 0xfcb00000, 129 .virtual = IO_ADDRESS(0xcb000000),
130 .pfn = __phys_to_pfn(0xcb000000), 130 .pfn = __phys_to_pfn(0xcb000000),
131 .length = SZ_4K, 131 .length = SZ_4K,
132 .type = MT_DEVICE 132 .type = MT_DEVICE
@@ -394,8 +394,8 @@ static struct platform_device *intcp_devs[] __initdata = {
394 */ 394 */
395static unsigned int mmc_status(struct device *dev) 395static unsigned int mmc_status(struct device *dev)
396{ 396{
397 unsigned int status = readl(0xfca00004); 397 unsigned int status = readl(IO_ADDRESS(0xca000000) + 4);
398 writel(8, 0xfcb00008); 398 writel(8, IO_ADDRESS(0xcb000000) + 8);
399 399
400 return status & 8; 400 return status & 8;
401} 401}