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authorSimon Arlott <simon@fire.lp0.eu>2007-05-11 15:40:30 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-20 15:10:32 -0400
commit6cbdc8c5357276307a77deeada3f04626ff17da6 (patch)
treee0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/mach-imx
parentfc432e1952a3899ce35e84b417e5d60f74cb901b (diff)
[ARM] spelling fixes
Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/cpufreq.c2
-rw-r--r--arch/arm/mach-imx/dma.c8
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index 7e70e0b0b989..467d899fbe75 100644
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -245,7 +245,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
245 if(mpctl0) { 245 if(mpctl0) {
246 CSCR |= CSCR_MPLL_RESTART; 246 CSCR |= CSCR_MPLL_RESTART;
247 247
248 /* Wait until MPLL is stablized */ 248 /* Wait until MPLL is stabilized */
249 while( CSCR & CSCR_MPLL_RESTART ); 249 while( CSCR & CSCR_MPLL_RESTART );
250 250
251 imx_set_async_mode(); 251 imx_set_async_mode();
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c
index 6d50d85a618c..bc6fb02d213b 100644
--- a/arch/arm/mach-imx/dma.c
+++ b/arch/arm/mach-imx/dma.c
@@ -131,7 +131,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch,
131 * The function setups DMA channel source and destination addresses for transfer 131 * The function setups DMA channel source and destination addresses for transfer
132 * specified by provided parameters. The scatter-gather emulation is disabled, 132 * specified by provided parameters. The scatter-gather emulation is disabled,
133 * because linear data block 133 * because linear data block
134 * form the physical address range is transfered. 134 * form the physical address range is transferred.
135 * Return value: if incorrect parameters are provided -%EINVAL. 135 * Return value: if incorrect parameters are provided -%EINVAL.
136 * Zero indicates success. 136 * Zero indicates success.
137 */ 137 */
@@ -192,7 +192,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
192 * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory 192 * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
193 * or %DMA_MODE_WRITE from memory to the device 193 * or %DMA_MODE_WRITE from memory to the device
194 * 194 *
195 * The function setups DMA channel state and registers to be ready for transfer 195 * The function sets up DMA channel state and registers to be ready for transfer
196 * specified by provided parameters. The scatter-gather emulation is set up 196 * specified by provided parameters. The scatter-gather emulation is set up
197 * according to the parameters. 197 * according to the parameters.
198 * 198 *
@@ -212,7 +212,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
212 * 212 *
213 * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x 213 * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
214 * 214 *
215 * Be carefull there and do not mistakenly mix source and target device 215 * Be careful here and do not mistakenly mix source and target device
216 * port sizes constants, they are really different: 216 * port sizes constants, they are really different:
217 * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32, 217 * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
218 * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32 218 * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
@@ -495,7 +495,7 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
495 /* 495 /*
496 * The cleaning of @sg field would be questionable 496 * The cleaning of @sg field would be questionable
497 * there, because its value can help to compute 497 * there, because its value can help to compute
498 * remaining/transfered bytes count in the handler 498 * remaining/transferred bytes count in the handler
499 */ 499 */
500 /*imx_dma_channels[i].sg = NULL;*/ 500 /*imx_dma_channels[i].sg = NULL;*/
501 501