aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-imx
diff options
context:
space:
mode:
authorJason Liu <jason.hui@linaro.org>2011-08-26 01:35:22 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-08-26 02:50:59 -0400
commit8d75a2620dc3e33ce504044c375c443ed7ed4128 (patch)
tree1417a2339770f8119c6a92ad40d61b670210bad6 /arch/arm/mach-imx
parentab116a86faf6aeafd0acf766c0c5d9475bf8493e (diff)
ARM: mx35: use generic function for displaying silicon revision
update to use generic function for displaying silicon revision Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/clock-imx35.c3
-rw-r--r--arch/arm/mach-imx/cpu-imx35.c30
2 files changed, 16 insertions, 17 deletions
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 88b62a071aea..abf30d48161f 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -537,7 +537,8 @@ int __init mx35_clocks_init()
537 __raw_writel(cgr3, CCM_BASE + CCM_CGR3); 537 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
538 538
539 clk_enable(&iim_clk); 539 clk_enable(&iim_clk);
540 mx35_read_cpu_rev(); 540 imx_print_silicon_rev("i.MX35", mx35_revision());
541 clk_disable(&iim_clk);
541 542
542#ifdef CONFIG_MXC_USE_EPIT 543#ifdef CONFIG_MXC_USE_EPIT
543 epit_timer_init(&epit1_clk, 544 epit_timer_init(&epit1_clk,
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
index 6637cd819ecb..846e46eb8cbf 100644
--- a/arch/arm/mach-imx/cpu-imx35.c
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -13,32 +13,30 @@
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#include <mach/iim.h> 14#include <mach/iim.h>
15 15
16unsigned int mx35_cpu_rev; 16static int mx35_cpu_rev = -1;
17EXPORT_SYMBOL(mx35_cpu_rev);
18 17
19void __init mx35_read_cpu_rev(void) 18static int mx35_read_cpu_rev(void)
20{ 19{
21 u32 rev; 20 u32 rev;
22 char *srev;
23 21
24 rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); 22 rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
25 switch (rev) { 23 switch (rev) {
26 case 0x00: 24 case 0x00:
27 mx35_cpu_rev = IMX_CHIP_REVISION_1_0; 25 return IMX_CHIP_REVISION_1_0;
28 srev = "1.0";
29 break;
30 case 0x10: 26 case 0x10:
31 mx35_cpu_rev = IMX_CHIP_REVISION_2_0; 27 return IMX_CHIP_REVISION_2_0;
32 srev = "2.0";
33 break;
34 case 0x11: 28 case 0x11:
35 mx35_cpu_rev = IMX_CHIP_REVISION_2_1; 29 return IMX_CHIP_REVISION_2_1;
36 srev = "2.1";
37 break;
38 default: 30 default:
39 mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; 31 return IMX_CHIP_REVISION_UNKNOWN;
40 srev = "unknown";
41 } 32 }
33}
34
35int mx35_revision(void)
36{
37 if (mx35_cpu_rev == -1)
38 mx35_cpu_rev = mx35_read_cpu_rev();
42 39
43 printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); 40 return mx35_cpu_rev;
44} 41}
42EXPORT_SYMBOL(mx35_revision);