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authorFabio Estevam <fabio.estevam@freescale.com>2012-11-22 14:10:45 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2013-01-25 05:12:36 -0500
commit8a1a9540384e06ca94296ec571f42ebcdc6c33ce (patch)
treed50936e7917f37cd0f0f2e5e4151b469db0997f9 /arch/arm/mach-imx
parent1a81dbde4df4e2fd94a5424b25bc78c19f446691 (diff)
ARM: clk-imx31: Add dummy clock
Add dummy clock as it is required by some i.mx drivers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/clk-imx31.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 8be64e0a4ace..590dd876d66a 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -34,8 +34,8 @@ static const char *csi_sel[] = { "upll", "spll", };
34static const char *fir_sel[] = { "mcu_main", "upll", "spll" }; 34static const char *fir_sel[] = { "mcu_main", "upll", "spll" };
35 35
36enum mx31_clks { 36enum mx31_clks {
37 ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, per_div, 37 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg,
38 per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre, 38 per_div, per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre,
39 fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate, 39 fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate,
40 iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate, 40 iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate,
41 uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate, 41 uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate,
@@ -52,6 +52,7 @@ int __init mx31_clocks_init(unsigned long fref)
52 void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR); 52 void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR);
53 int i; 53 int i;
54 54
55 clk[dummy] = imx_clk_fixed("dummy", 0);
55 clk[ckih] = imx_clk_fixed("ckih", fref); 56 clk[ckih] = imx_clk_fixed("ckih", fref);
56 clk[ckil] = imx_clk_fixed("ckil", 32768); 57 clk[ckil] = imx_clk_fixed("ckil", 32768);
57 clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL); 58 clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL);