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authorShawn Guo <shawn.guo@linaro.org>2013-04-12 07:00:28 -0400
committerShawn Guo <shawn.guo@linaro.org>2013-04-12 07:00:28 -0400
commita862d88d3f119efcb50aa3b8644643d6c97e3250 (patch)
tree90ee8b237901a037e43c27330737089e85f70172 /arch/arm/mach-imx
parent7c3c1b8c90e0f226610b9932cd66678d99e42176 (diff)
parent3442a7b51d1cfae144f3289ab0be44e27c236f53 (diff)
Merge tag 'imx-cleanup-3.10' into imx/soc
The imx cleanup for 3.10: * Clean up a couple of unneeded function declarations * Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well as the replacement * Remove platform ahci support * Clean up unused ARCH/MACH Kconfig symbols * Remove a couple of unused files
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/Kconfig18
-rw-r--r--arch/arm/mach-imx/Makefile3
-rw-r--r--arch/arm/mach-imx/Makefile.boot35
-rw-r--r--arch/arm/mach-imx/avic.c4
-rw-r--r--arch/arm/mach-imx/clk-imx27.c2
-rw-r--r--arch/arm/mach-imx/common.h3
-rw-r--r--arch/arm/mach-imx/cpu_op-mx51.c31
-rw-r--r--arch/arm/mach-imx/cpu_op-mx51.h14
-rw-r--r--arch/arm/mach-imx/cpufreq.c206
-rw-r--r--arch/arm/mach-imx/devices/Kconfig4
-rw-r--r--arch/arm/mach-imx/devices/Makefile1
-rw-r--r--arch/arm/mach-imx/devices/devices-common.h10
-rw-r--r--arch/arm/mach-imx/devices/platform-ahci-imx.c157
-rw-r--r--arch/arm/mach-imx/hardware.h1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx51sd.c5
-rw-r--r--arch/arm/mach-imx/mach-mx51_babbage.c4
-rw-r--r--arch/arm/mach-imx/mx6q.h31
17 files changed, 3 insertions, 526 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 4c9c6f9d2c55..6575e4ebe26e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -83,24 +83,12 @@ config ARCH_MXC_IOMUX_V3
83config ARCH_MX1 83config ARCH_MX1
84 bool 84 bool
85 85
86config MACH_MX21
87 bool
88
89config ARCH_MX25 86config ARCH_MX25
90 bool 87 bool
91 88
92config MACH_MX27 89config MACH_MX27
93 bool 90 bool
94 91
95config ARCH_MX5
96 bool
97
98config ARCH_MX51
99 bool
100
101config ARCH_MX53
102 bool
103
104config SOC_IMX1 92config SOC_IMX1
105 bool 93 bool
106 select ARCH_MX1 94 select ARCH_MX1
@@ -114,7 +102,6 @@ config SOC_IMX21
114 select COMMON_CLK 102 select COMMON_CLK
115 select CPU_ARM926T 103 select CPU_ARM926T
116 select IMX_HAVE_IOMUX_V1 104 select IMX_HAVE_IOMUX_V1
117 select MACH_MX21
118 select MXC_AVIC 105 select MXC_AVIC
119 106
120config SOC_IMX25 107config SOC_IMX25
@@ -155,7 +142,6 @@ config SOC_IMX35
155config SOC_IMX5 142config SOC_IMX5
156 bool 143 bool
157 select ARCH_HAS_CPUFREQ 144 select ARCH_HAS_CPUFREQ
158 select ARCH_MX5
159 select ARCH_MXC_IOMUX_V3 145 select ARCH_MXC_IOMUX_V3
160 select COMMON_CLK 146 select COMMON_CLK
161 select CPU_V7 147 select CPU_V7
@@ -163,8 +149,6 @@ config SOC_IMX5
163 149
164config SOC_IMX51 150config SOC_IMX51
165 bool 151 bool
166 select ARCH_MX5
167 select ARCH_MX51
168 select PINCTRL 152 select PINCTRL
169 select PINCTRL_IMX51 153 select PINCTRL_IMX51
170 select SOC_IMX5 154 select SOC_IMX5
@@ -789,8 +773,6 @@ comment "Device tree only"
789 773
790config SOC_IMX53 774config SOC_IMX53
791 bool "i.MX53 support" 775 bool "i.MX53 support"
792 select ARCH_MX5
793 select ARCH_MX53
794 select HAVE_CAN_FLEXCAN if CAN 776 select HAVE_CAN_FLEXCAN if CAN
795 select IMX_HAVE_PLATFORM_IMX2_WDT 777 select IMX_HAVE_PLATFORM_IMX2_WDT
796 select PINCTRL 778 select PINCTRL
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index c4ce0906d76a..23555b0c08a9 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -12,7 +12,7 @@ obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-
12obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o 12obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
13 13
14imx5-pm-$(CONFIG_PM) += pm-imx5.o 14imx5-pm-$(CONFIG_PM) += pm-imx5.o
15obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o 15obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y)
16 16
17obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ 17obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
18 clk-pfd.o clk-busy.o clk.o 18 clk-pfd.o clk-busy.o clk.o
@@ -27,7 +27,6 @@ obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
27obj-$(CONFIG_MXC_ULPI) += ulpi.o 27obj-$(CONFIG_MXC_ULPI) += ulpi.o
28obj-$(CONFIG_MXC_USE_EPIT) += epit.o 28obj-$(CONFIG_MXC_USE_EPIT) += epit.o
29obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o 29obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
30obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
31 30
32ifeq ($(CONFIG_CPU_IDLE),y) 31ifeq ($(CONFIG_CPU_IDLE),y)
33obj-y += cpuidle.o 32obj-y += cpuidle.o
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
deleted file mode 100644
index 41ba1bb0437b..000000000000
--- a/arch/arm/mach-imx/Makefile.boot
+++ /dev/null
@@ -1,35 +0,0 @@
1zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000
2params_phys-$(CONFIG_SOC_IMX1) := 0x08000100
3initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000
4
5zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000
6params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
7initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
8
9zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000
10params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
11initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
12
13zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000
14params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
15initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
16
17zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000
18params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
19initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
20
21zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
24
25zreladdr-$(CONFIG_SOC_IMX51) += 0x90008000
26params_phys-$(CONFIG_SOC_IMX51) := 0x90000100
27initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000
28
29zreladdr-$(CONFIG_SOC_IMX53) += 0x70008000
30params_phys-$(CONFIG_SOC_IMX53) := 0x70000100
31initrd_phys-$(CONFIG_SOC_IMX53) := 0x70800000
32
33zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
34params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
35initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c
index 0eff23ed92b9..49c87e7aa817 100644
--- a/arch/arm/mach-imx/avic.c
+++ b/arch/arm/mach-imx/avic.c
@@ -54,8 +54,6 @@
54void __iomem *avic_base; 54void __iomem *avic_base;
55static struct irq_domain *domain; 55static struct irq_domain *domain;
56 56
57static u32 avic_saved_mask_reg[2];
58
59#ifdef CONFIG_MXC_IRQ_PRIOR 57#ifdef CONFIG_MXC_IRQ_PRIOR
60static int avic_irq_set_priority(unsigned char irq, unsigned char prio) 58static int avic_irq_set_priority(unsigned char irq, unsigned char prio)
61{ 59{
@@ -113,6 +111,8 @@ static struct mxc_extra_irq avic_extra_irq = {
113}; 111};
114 112
115#ifdef CONFIG_PM 113#ifdef CONFIG_PM
114static u32 avic_saved_mask_reg[2];
115
116static void avic_irq_suspend(struct irq_data *d) 116static void avic_irq_suspend(struct irq_data *d)
117{ 117{
118 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 118 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 30b3242a7d49..8e3b65719106 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -278,8 +278,6 @@ int __init mx27_clocks_init(unsigned long fref)
278 clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); 278 clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
279 clk_register_clkdev(clk[cpu_div], "cpu", NULL); 279 clk_register_clkdev(clk[cpu_div], "cpu", NULL);
280 clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); 280 clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
281 clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");
282 clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");
283 281
284 mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1); 282 mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
285 283
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 5bf4a97ab241..9fea2522d7a3 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -113,7 +113,6 @@ extern void imx_set_cpu_jump(int cpu, void *jump_addr);
113extern u32 imx_get_cpu_arg(int cpu); 113extern u32 imx_get_cpu_arg(int cpu);
114extern void imx_set_cpu_arg(int cpu, u32 arg); 114extern void imx_set_cpu_arg(int cpu, u32 arg);
115extern void v7_cpu_resume(void); 115extern void v7_cpu_resume(void);
116extern u32 *pl310_get_save_ptr(void);
117#ifdef CONFIG_SMP 116#ifdef CONFIG_SMP
118extern void v7_secondary_startup(void); 117extern void v7_secondary_startup(void);
119extern void imx_scu_map_io(void); 118extern void imx_scu_map_io(void);
@@ -124,8 +123,6 @@ static inline void imx_scu_map_io(void) {}
124static inline void imx_smp_prepare(void) {} 123static inline void imx_smp_prepare(void) {}
125static inline void imx_scu_standby_enable(void) {} 124static inline void imx_scu_standby_enable(void) {}
126#endif 125#endif
127extern void imx_enable_cpu(int cpu, bool enable);
128extern void imx_set_cpu_jump(int cpu, void *jump_addr);
129extern void imx_src_init(void); 126extern void imx_src_init(void);
130extern void imx_src_prepare_restart(void); 127extern void imx_src_prepare_restart(void);
131extern void imx_gpc_init(void); 128extern void imx_gpc_init(void);
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
deleted file mode 100644
index b9ef692b61a2..000000000000
--- a/arch/arm/mach-imx/cpu_op-mx51.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14#include <linux/bug.h>
15#include <linux/types.h>
16#include <linux/kernel.h>
17
18#include "hardware.h"
19
20static struct cpu_op mx51_cpu_op[] = {
21 {
22 .cpu_rate = 160000000,},
23 {
24 .cpu_rate = 800000000,},
25};
26
27struct cpu_op *mx51_get_cpu_op(int *op)
28{
29 *op = ARRAY_SIZE(mx51_cpu_op);
30 return mx51_cpu_op;
31}
diff --git a/arch/arm/mach-imx/cpu_op-mx51.h b/arch/arm/mach-imx/cpu_op-mx51.h
deleted file mode 100644
index 97477fecb469..000000000000
--- a/arch/arm/mach-imx/cpu_op-mx51.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14extern struct cpu_op *mx51_get_cpu_op(int *op);
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
deleted file mode 100644
index d8c75c3c925d..000000000000
--- a/arch/arm/mach-imx/cpufreq.c
+++ /dev/null
@@ -1,206 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/*
15 * A driver for the Freescale Semiconductor i.MXC CPUfreq module.
16 * The CPUFREQ driver is for controlling CPU frequency. It allows you to change
17 * the CPU clock speed on the fly.
18 */
19
20#include <linux/module.h>
21#include <linux/cpufreq.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/slab.h>
25
26#include "hardware.h"
27
28#define CLK32_FREQ 32768
29#define NANOSECOND (1000 * 1000 * 1000)
30
31struct cpu_op *(*get_cpu_op)(int *op);
32
33static int cpu_freq_khz_min;
34static int cpu_freq_khz_max;
35
36static struct clk *cpu_clk;
37static struct cpufreq_frequency_table *imx_freq_table;
38
39static int cpu_op_nr;
40static struct cpu_op *cpu_op_tbl;
41
42static int set_cpu_freq(int freq)
43{
44 int ret = 0;
45 int org_cpu_rate;
46
47 org_cpu_rate = clk_get_rate(cpu_clk);
48 if (org_cpu_rate == freq)
49 return ret;
50
51 ret = clk_set_rate(cpu_clk, freq);
52 if (ret != 0) {
53 printk(KERN_DEBUG "cannot set CPU clock rate\n");
54 return ret;
55 }
56
57 return ret;
58}
59
60static int mxc_verify_speed(struct cpufreq_policy *policy)
61{
62 if (policy->cpu != 0)
63 return -EINVAL;
64
65 return cpufreq_frequency_table_verify(policy, imx_freq_table);
66}
67
68static unsigned int mxc_get_speed(unsigned int cpu)
69{
70 if (cpu)
71 return 0;
72
73 return clk_get_rate(cpu_clk) / 1000;
74}
75
76static int mxc_set_target(struct cpufreq_policy *policy,
77 unsigned int target_freq, unsigned int relation)
78{
79 struct cpufreq_freqs freqs;
80 int freq_Hz;
81 int ret = 0;
82 unsigned int index;
83
84 cpufreq_frequency_table_target(policy, imx_freq_table,
85 target_freq, relation, &index);
86 freq_Hz = imx_freq_table[index].frequency * 1000;
87
88 freqs.old = clk_get_rate(cpu_clk) / 1000;
89 freqs.new = freq_Hz / 1000;
90 freqs.cpu = 0;
91 freqs.flags = 0;
92 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
93
94 ret = set_cpu_freq(freq_Hz);
95
96 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
97
98 return ret;
99}
100
101static int mxc_cpufreq_init(struct cpufreq_policy *policy)
102{
103 int ret;
104 int i;
105
106 printk(KERN_INFO "i.MXC CPU frequency driver\n");
107
108 if (policy->cpu != 0)
109 return -EINVAL;
110
111 if (!get_cpu_op)
112 return -EINVAL;
113
114 cpu_clk = clk_get(NULL, "cpu_clk");
115 if (IS_ERR(cpu_clk)) {
116 printk(KERN_ERR "%s: failed to get cpu clock\n", __func__);
117 return PTR_ERR(cpu_clk);
118 }
119
120 cpu_op_tbl = get_cpu_op(&cpu_op_nr);
121
122 cpu_freq_khz_min = cpu_op_tbl[0].cpu_rate / 1000;
123 cpu_freq_khz_max = cpu_op_tbl[0].cpu_rate / 1000;
124
125 imx_freq_table = kmalloc(
126 sizeof(struct cpufreq_frequency_table) * (cpu_op_nr + 1),
127 GFP_KERNEL);
128 if (!imx_freq_table) {
129 ret = -ENOMEM;
130 goto err1;
131 }
132
133 for (i = 0; i < cpu_op_nr; i++) {
134 imx_freq_table[i].index = i;
135 imx_freq_table[i].frequency = cpu_op_tbl[i].cpu_rate / 1000;
136
137 if ((cpu_op_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min)
138 cpu_freq_khz_min = cpu_op_tbl[i].cpu_rate / 1000;
139
140 if ((cpu_op_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max)
141 cpu_freq_khz_max = cpu_op_tbl[i].cpu_rate / 1000;
142 }
143
144 imx_freq_table[i].index = i;
145 imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
146
147 policy->cur = clk_get_rate(cpu_clk) / 1000;
148 policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min;
149 policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max;
150
151 /* Manual states, that PLL stabilizes in two CLK32 periods */
152 policy->cpuinfo.transition_latency = 2 * NANOSECOND / CLK32_FREQ;
153
154 ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table);
155
156 if (ret < 0) {
157 printk(KERN_ERR "%s: failed to register i.MXC CPUfreq with error code %d\n",
158 __func__, ret);
159 goto err;
160 }
161
162 cpufreq_frequency_table_get_attr(imx_freq_table, policy->cpu);
163 return 0;
164err:
165 kfree(imx_freq_table);
166err1:
167 clk_put(cpu_clk);
168 return ret;
169}
170
171static int mxc_cpufreq_exit(struct cpufreq_policy *policy)
172{
173 cpufreq_frequency_table_put_attr(policy->cpu);
174
175 set_cpu_freq(cpu_freq_khz_max * 1000);
176 clk_put(cpu_clk);
177 kfree(imx_freq_table);
178 return 0;
179}
180
181static struct cpufreq_driver mxc_driver = {
182 .flags = CPUFREQ_STICKY,
183 .verify = mxc_verify_speed,
184 .target = mxc_set_target,
185 .get = mxc_get_speed,
186 .init = mxc_cpufreq_init,
187 .exit = mxc_cpufreq_exit,
188 .name = "imx",
189};
190
191static int mxc_cpufreq_driver_init(void)
192{
193 return cpufreq_register_driver(&mxc_driver);
194}
195
196static void mxc_cpufreq_driver_exit(void)
197{
198 cpufreq_unregister_driver(&mxc_driver);
199}
200
201module_init(mxc_cpufreq_driver_init);
202module_exit(mxc_cpufreq_driver_exit);
203
204MODULE_AUTHOR("Freescale Semiconductor Inc. Yong Shen <yong.shen@linaro.org>");
205MODULE_DESCRIPTION("CPUfreq driver for i.MX");
206MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
index 9b9ba1f4ffe1..3dd2b1b041d1 100644
--- a/arch/arm/mach-imx/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
@@ -86,7 +86,3 @@ config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
86 86
87config IMX_HAVE_PLATFORM_SPI_IMX 87config IMX_HAVE_PLATFORM_SPI_IMX
88 bool 88 bool
89
90config IMX_HAVE_PLATFORM_AHCI
91 bool
92 default y if ARCH_MX53
diff --git a/arch/arm/mach-imx/devices/Makefile b/arch/arm/mach-imx/devices/Makefile
index 6acf37e0c119..67416fb1dc69 100644
--- a/arch/arm/mach-imx/devices/Makefile
+++ b/arch/arm/mach-imx/devices/Makefile
@@ -29,5 +29,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RTC) += platform-mxc_rtc.o
29obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o 29obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
30obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o 30obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
31obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o 31obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
32obj-$(CONFIG_IMX_HAVE_PLATFORM_AHCI) += platform-ahci-imx.o
33obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o 32obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o
diff --git a/arch/arm/mach-imx/devices/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h
index 9bd5777ff0e7..453e20bc2657 100644
--- a/arch/arm/mach-imx/devices/devices-common.h
+++ b/arch/arm/mach-imx/devices/devices-common.h
@@ -344,13 +344,3 @@ struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
344 int irq, int irq_err); 344 int irq, int irq_err);
345struct platform_device *imx_add_imx_sdma(char *name, 345struct platform_device *imx_add_imx_sdma(char *name,
346 resource_size_t iobase, int irq, struct sdma_platform_data *pdata); 346 resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
347
348#include <linux/ahci_platform.h>
349struct imx_ahci_imx_data {
350 const char *devid;
351 resource_size_t iobase;
352 resource_size_t irq;
353};
354struct platform_device *__init imx_add_ahci_imx(
355 const struct imx_ahci_imx_data *data,
356 const struct ahci_platform_data *pdata);
diff --git a/arch/arm/mach-imx/devices/platform-ahci-imx.c b/arch/arm/mach-imx/devices/platform-ahci-imx.c
deleted file mode 100644
index 3d87dd9c284a..000000000000
--- a/arch/arm/mach-imx/devices/platform-ahci-imx.c
+++ /dev/null
@@ -1,157 +0,0 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/io.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/device.h>
25#include <linux/dma-mapping.h>
26#include <asm/sizes.h>
27
28#include "../hardware.h"
29#include "devices-common.h"
30
31#define imx_ahci_imx_data_entry_single(soc, _devid) \
32 { \
33 .devid = _devid, \
34 .iobase = soc ## _SATA_BASE_ADDR, \
35 .irq = soc ## _INT_SATA, \
36 }
37
38#ifdef CONFIG_SOC_IMX53
39const struct imx_ahci_imx_data imx53_ahci_imx_data __initconst =
40 imx_ahci_imx_data_entry_single(MX53, "imx53-ahci");
41#endif
42
43enum {
44 HOST_CAP = 0x00,
45 HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */
46 HOST_PORTS_IMPL = 0x0c,
47 HOST_TIMER1MS = 0xe0, /* Timer 1-ms */
48};
49
50static struct clk *sata_clk, *sata_ref_clk;
51
52/* AHCI module Initialization, if return 0, initialization is successful. */
53static int imx_sata_init(struct device *dev, void __iomem *addr)
54{
55 u32 tmpdata;
56 int ret = 0;
57 struct clk *clk;
58
59 sata_clk = clk_get(dev, "ahci");
60 if (IS_ERR(sata_clk)) {
61 dev_err(dev, "no sata clock.\n");
62 return PTR_ERR(sata_clk);
63 }
64 ret = clk_prepare_enable(sata_clk);
65 if (ret) {
66 dev_err(dev, "can't prepare/enable sata clock.\n");
67 goto put_sata_clk;
68 }
69
70 /* Get the AHCI SATA PHY CLK */
71 sata_ref_clk = clk_get(dev, "ahci_phy");
72 if (IS_ERR(sata_ref_clk)) {
73 dev_err(dev, "no sata ref clock.\n");
74 ret = PTR_ERR(sata_ref_clk);
75 goto release_sata_clk;
76 }
77 ret = clk_prepare_enable(sata_ref_clk);
78 if (ret) {
79 dev_err(dev, "can't prepare/enable sata ref clock.\n");
80 goto put_sata_ref_clk;
81 }
82
83 /* Get the AHB clock rate, and configure the TIMER1MS reg later */
84 clk = clk_get(dev, "ahci_dma");
85 if (IS_ERR(clk)) {
86 dev_err(dev, "no dma clock.\n");
87 ret = PTR_ERR(clk);
88 goto release_sata_ref_clk;
89 }
90 tmpdata = clk_get_rate(clk) / 1000;
91 clk_put(clk);
92
93 writel(tmpdata, addr + HOST_TIMER1MS);
94
95 tmpdata = readl(addr + HOST_CAP);
96 if (!(tmpdata & HOST_CAP_SSS)) {
97 tmpdata |= HOST_CAP_SSS;
98 writel(tmpdata, addr + HOST_CAP);
99 }
100
101 if (!(readl(addr + HOST_PORTS_IMPL) & 0x1))
102 writel((readl(addr + HOST_PORTS_IMPL) | 0x1),
103 addr + HOST_PORTS_IMPL);
104
105 return 0;
106
107release_sata_ref_clk:
108 clk_disable_unprepare(sata_ref_clk);
109put_sata_ref_clk:
110 clk_put(sata_ref_clk);
111release_sata_clk:
112 clk_disable_unprepare(sata_clk);
113put_sata_clk:
114 clk_put(sata_clk);
115
116 return ret;
117}
118
119static void imx_sata_exit(struct device *dev)
120{
121 clk_disable_unprepare(sata_ref_clk);
122 clk_put(sata_ref_clk);
123
124 clk_disable_unprepare(sata_clk);
125 clk_put(sata_clk);
126
127}
128struct platform_device *__init imx_add_ahci_imx(
129 const struct imx_ahci_imx_data *data,
130 const struct ahci_platform_data *pdata)
131{
132 struct resource res[] = {
133 {
134 .start = data->iobase,
135 .end = data->iobase + SZ_4K - 1,
136 .flags = IORESOURCE_MEM,
137 }, {
138 .start = data->irq,
139 .end = data->irq,
140 .flags = IORESOURCE_IRQ,
141 },
142 };
143
144 return imx_add_platform_device_dmamask(data->devid, 0,
145 res, ARRAY_SIZE(res),
146 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
147}
148
149struct platform_device *__init imx53_add_ahci_imx(void)
150{
151 struct ahci_platform_data pdata = {
152 .init = imx_sata_init,
153 .exit = imx_sata_exit,
154 };
155
156 return imx_add_ahci_imx(&imx53_ahci_imx_data, &pdata);
157}
diff --git a/arch/arm/mach-imx/hardware.h b/arch/arm/mach-imx/hardware.h
index 911e9b31b03f..356131f7b591 100644
--- a/arch/arm/mach-imx/hardware.h
+++ b/arch/arm/mach-imx/hardware.h
@@ -102,7 +102,6 @@
102 102
103#include "mxc.h" 103#include "mxc.h"
104 104
105#include "mx6q.h"
106#include "mx51.h" 105#include "mx51.h"
107#include "mx53.h" 106#include "mx53.h"
108#include "mx3x.h" 107#include "mx3x.h"
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index 9b7393234f6f..9b5ddf5bbd33 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -33,7 +33,6 @@
33 33
34#include "common.h" 34#include "common.h"
35#include "devices-imx51.h" 35#include "devices-imx51.h"
36#include "cpu_op-mx51.h"
37#include "eukrea-baseboards.h" 36#include "eukrea-baseboards.h"
38#include "hardware.h" 37#include "hardware.h"
39#include "iomux-mx51.h" 38#include "iomux-mx51.h"
@@ -285,10 +284,6 @@ static void __init eukrea_cpuimx51sd_init(void)
285 mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51sd_pads, 284 mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51sd_pads,
286 ARRAY_SIZE(eukrea_cpuimx51sd_pads)); 285 ARRAY_SIZE(eukrea_cpuimx51sd_pads));
287 286
288#if defined(CONFIG_CPU_FREQ_IMX)
289 get_cpu_op = mx51_get_cpu_op;
290#endif
291
292 imx51_add_imx_uart(0, &uart_pdata); 287 imx51_add_imx_uart(0, &uart_pdata);
293 imx51_add_mxc_nand(&eukrea_cpuimx51sd_nand_board_info); 288 imx51_add_mxc_nand(&eukrea_cpuimx51sd_nand_board_info);
294 imx51_add_imx2_wdt(0); 289 imx51_add_imx2_wdt(0);
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index 6c4d7feb4520..f3d264a636fa 100644
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
@@ -27,7 +27,6 @@
27 27
28#include "common.h" 28#include "common.h"
29#include "devices-imx51.h" 29#include "devices-imx51.h"
30#include "cpu_op-mx51.h"
31#include "hardware.h" 30#include "hardware.h"
32#include "iomux-mx51.h" 31#include "iomux-mx51.h"
33 32
@@ -371,9 +370,6 @@ static void __init mx51_babbage_init(void)
371 370
372 imx51_soc_init(); 371 imx51_soc_init();
373 372
374#if defined(CONFIG_CPU_FREQ_IMX)
375 get_cpu_op = mx51_get_cpu_op;
376#endif
377 imx51_babbage_common_init(); 373 imx51_babbage_common_init();
378 374
379 imx51_add_imx_uart(0, &uart_pdata); 375 imx51_add_imx_uart(0, &uart_pdata);
diff --git a/arch/arm/mach-imx/mx6q.h b/arch/arm/mach-imx/mx6q.h
deleted file mode 100644
index 19d3f54db5af..000000000000
--- a/arch/arm/mach-imx/mx6q.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#ifndef __MACH_MX6Q_H__
14#define __MACH_MX6Q_H__
15
16#define MX6Q_IO_P2V(x) IMX_IO_P2V(x)
17#define MX6Q_IO_ADDRESS(x) IOMEM(MX6Q_IO_P2V(x))
18
19/*
20 * The following are the blocks that need to be statically mapped.
21 * For other blocks, the base address really should be retrieved from
22 * device tree.
23 */
24#define MX6Q_SCU_BASE_ADDR 0x00a00000
25#define MX6Q_SCU_SIZE 0x1000
26#define MX6Q_CCM_BASE_ADDR 0x020c4000
27#define MX6Q_CCM_SIZE 0x4000
28#define MX6Q_ANATOP_BASE_ADDR 0x020c8000
29#define MX6Q_ANATOP_SIZE 0x1000
30
31#endif /* __MACH_MX6Q_H__ */