diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-02-28 07:23:22 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-02-28 07:23:27 -0500 |
commit | e135e4506c6d3e9b196890877a9a2815f71b04ac (patch) | |
tree | b4f36fdb126eb35a9c7a5632ad1b628bbf11971d /arch/arm/mach-imx | |
parent | ee80285e1b79e6a7a6855c8be65bddc61f4d69be (diff) | |
parent | 1aa0cf677949dafaaff8cd1a78f1f69a239138ac (diff) |
Merge branch 'imx/driver' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/drivers
* 'imx/driver' of git://git.linaro.org/people/shawnguo/linux-2.6: (3 commits)
ARM: imx6q: add cko1 clock
ARM: mxc: make imx_dma_is_general_purpose more generic for sdma
ARM: imx6: Rename DEBUG_IMX6Q_UART to UART4
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r-- | arch/arm/mach-imx/clock-imx6q.c | 74 | ||||
-rw-r--r-- | arch/arm/mach-imx/lluart.c | 2 |
2 files changed, 74 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 2d88f8b9a454..111c328f5420 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c | |||
@@ -329,6 +329,12 @@ | |||
329 | #define BM_CLPCR_MASK_SCU_IDLE (0x1 << 26) | 329 | #define BM_CLPCR_MASK_SCU_IDLE (0x1 << 26) |
330 | #define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27) | 330 | #define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27) |
331 | 331 | ||
332 | #define BP_CCOSR_CKO1_EN 7 | ||
333 | #define BP_CCOSR_CKO1_PODF 4 | ||
334 | #define BM_CCOSR_CKO1_PODF (0x7 << 4) | ||
335 | #define BP_CCOSR_CKO1_SEL 0 | ||
336 | #define BM_CCOSR_CKO1_SEL (0xf << 0) | ||
337 | |||
332 | #define FREQ_480M 480000000 | 338 | #define FREQ_480M 480000000 |
333 | #define FREQ_528M 528000000 | 339 | #define FREQ_528M 528000000 |
334 | #define FREQ_594M 594000000 | 340 | #define FREQ_594M 594000000 |
@@ -393,6 +399,7 @@ static struct clk ipu1_di1_clk; | |||
393 | static struct clk ipu2_di0_clk; | 399 | static struct clk ipu2_di0_clk; |
394 | static struct clk ipu2_di1_clk; | 400 | static struct clk ipu2_di1_clk; |
395 | static struct clk enfc_clk; | 401 | static struct clk enfc_clk; |
402 | static struct clk cko1_clk; | ||
396 | static struct clk dummy_clk = {}; | 403 | static struct clk dummy_clk = {}; |
397 | 404 | ||
398 | static unsigned long external_high_reference; | 405 | static unsigned long external_high_reference; |
@@ -938,6 +945,24 @@ static void _clk_disable(struct clk *clk) | |||
938 | writel_relaxed(reg, clk->enable_reg); | 945 | writel_relaxed(reg, clk->enable_reg); |
939 | } | 946 | } |
940 | 947 | ||
948 | static int _clk_enable_1b(struct clk *clk) | ||
949 | { | ||
950 | u32 reg; | ||
951 | reg = readl_relaxed(clk->enable_reg); | ||
952 | reg |= 0x1 << clk->enable_shift; | ||
953 | writel_relaxed(reg, clk->enable_reg); | ||
954 | |||
955 | return 0; | ||
956 | } | ||
957 | |||
958 | static void _clk_disable_1b(struct clk *clk) | ||
959 | { | ||
960 | u32 reg; | ||
961 | reg = readl_relaxed(clk->enable_reg); | ||
962 | reg &= ~(0x1 << clk->enable_shift); | ||
963 | writel_relaxed(reg, clk->enable_reg); | ||
964 | } | ||
965 | |||
941 | struct divider { | 966 | struct divider { |
942 | struct clk *clk; | 967 | struct clk *clk; |
943 | void __iomem *reg; | 968 | void __iomem *reg; |
@@ -983,6 +1008,7 @@ DEF_CLK_DIV1(ipu2_di0_pre_div, &ipu2_di0_pre_clk, CSCDR2, IPU2_DI0_PRE); | |||
983 | DEF_CLK_DIV1(ipu2_di1_pre_div, &ipu2_di1_pre_clk, CSCDR2, IPU2_DI1_PRE); | 1008 | DEF_CLK_DIV1(ipu2_di1_pre_div, &ipu2_di1_pre_clk, CSCDR2, IPU2_DI1_PRE); |
984 | DEF_CLK_DIV1(ipu1_div, &ipu1_clk, CSCDR3, IPU1_HSP); | 1009 | DEF_CLK_DIV1(ipu1_div, &ipu1_clk, CSCDR3, IPU1_HSP); |
985 | DEF_CLK_DIV1(ipu2_div, &ipu2_clk, CSCDR3, IPU2_HSP); | 1010 | DEF_CLK_DIV1(ipu2_div, &ipu2_clk, CSCDR3, IPU2_HSP); |
1011 | DEF_CLK_DIV1(cko1_div, &cko1_clk, CCOSR, CKO1); | ||
986 | 1012 | ||
987 | #define DEF_CLK_DIV2(d, c, r, b) \ | 1013 | #define DEF_CLK_DIV2(d, c, r, b) \ |
988 | static struct divider d = { \ | 1014 | static struct divider d = { \ |
@@ -1038,6 +1064,7 @@ static struct divider *dividers[] = { | |||
1038 | &enfc_div, | 1064 | &enfc_div, |
1039 | &spdif_div, | 1065 | &spdif_div, |
1040 | &asrc_serial_div, | 1066 | &asrc_serial_div, |
1067 | &cko1_div, | ||
1041 | }; | 1068 | }; |
1042 | 1069 | ||
1043 | static unsigned long ldb_di_clk_get_rate(struct clk *clk) | 1070 | static unsigned long ldb_di_clk_get_rate(struct clk *clk) |
@@ -1625,6 +1652,32 @@ DEF_IPU_DI_MUX(CSCDR2, 2, 1); | |||
1625 | DEF_IPU_MUX(1); | 1652 | DEF_IPU_MUX(1); |
1626 | DEF_IPU_MUX(2); | 1653 | DEF_IPU_MUX(2); |
1627 | 1654 | ||
1655 | static struct multiplexer cko1_mux = { | ||
1656 | .clk = &cko1_clk, | ||
1657 | .reg = CCOSR, | ||
1658 | .bp = BP_CCOSR_CKO1_SEL, | ||
1659 | .bm = BM_CCOSR_CKO1_SEL, | ||
1660 | .parents = { | ||
1661 | &pll3_usb_otg, | ||
1662 | &pll2_bus, | ||
1663 | &pll1_sys, | ||
1664 | &pll5_video, | ||
1665 | &dummy_clk, | ||
1666 | &axi_clk, | ||
1667 | &enfc_clk, | ||
1668 | &ipu1_di0_clk, | ||
1669 | &ipu1_di1_clk, | ||
1670 | &ipu2_di0_clk, | ||
1671 | &ipu2_di1_clk, | ||
1672 | &ahb_clk, | ||
1673 | &ipg_clk, | ||
1674 | &ipg_perclk, | ||
1675 | &ckil_clk, | ||
1676 | &pll4_audio, | ||
1677 | NULL | ||
1678 | }, | ||
1679 | }; | ||
1680 | |||
1628 | static struct multiplexer *multiplexers[] = { | 1681 | static struct multiplexer *multiplexers[] = { |
1629 | &axi_mux, | 1682 | &axi_mux, |
1630 | &periph_mux, | 1683 | &periph_mux, |
@@ -1667,6 +1720,7 @@ static struct multiplexer *multiplexers[] = { | |||
1667 | &ipu2_di1_mux, | 1720 | &ipu2_di1_mux, |
1668 | &ipu1_mux, | 1721 | &ipu1_mux, |
1669 | &ipu2_mux, | 1722 | &ipu2_mux, |
1723 | &cko1_mux, | ||
1670 | }; | 1724 | }; |
1671 | 1725 | ||
1672 | static int _clk_set_parent(struct clk *clk, struct clk *parent) | 1726 | static int _clk_set_parent(struct clk *clk, struct clk *parent) |
@@ -1690,7 +1744,7 @@ static int _clk_set_parent(struct clk *clk, struct clk *parent) | |||
1690 | break; | 1744 | break; |
1691 | i++; | 1745 | i++; |
1692 | } | 1746 | } |
1693 | if (!m->parents[i]) | 1747 | if (!m->parents[i] || m->parents[i] == &dummy_clk) |
1694 | return -EINVAL; | 1748 | return -EINVAL; |
1695 | 1749 | ||
1696 | val = readl_relaxed(m->reg); | 1750 | val = readl_relaxed(m->reg); |
@@ -1745,6 +1799,20 @@ DEF_NG_CLK(asrc_serial_clk, &pll3_usb_otg); | |||
1745 | .secondary = s, \ | 1799 | .secondary = s, \ |
1746 | } | 1800 | } |
1747 | 1801 | ||
1802 | #define DEF_CLK_1B(name, er, es, p, s) \ | ||
1803 | static struct clk name = { \ | ||
1804 | .enable_reg = er, \ | ||
1805 | .enable_shift = es, \ | ||
1806 | .enable = _clk_enable_1b, \ | ||
1807 | .disable = _clk_disable_1b, \ | ||
1808 | .get_rate = _clk_get_rate, \ | ||
1809 | .set_rate = _clk_set_rate, \ | ||
1810 | .round_rate = _clk_round_rate, \ | ||
1811 | .set_parent = _clk_set_parent, \ | ||
1812 | .parent = p, \ | ||
1813 | .secondary = s, \ | ||
1814 | } | ||
1815 | |||
1748 | DEF_CLK(aips_tz1_clk, CCGR0, CG0, &ahb_clk, NULL); | 1816 | DEF_CLK(aips_tz1_clk, CCGR0, CG0, &ahb_clk, NULL); |
1749 | DEF_CLK(aips_tz2_clk, CCGR0, CG1, &ahb_clk, NULL); | 1817 | DEF_CLK(aips_tz2_clk, CCGR0, CG1, &ahb_clk, NULL); |
1750 | DEF_CLK(apbh_dma_clk, CCGR0, CG2, &ahb_clk, NULL); | 1818 | DEF_CLK(apbh_dma_clk, CCGR0, CG2, &ahb_clk, NULL); |
@@ -1811,6 +1879,7 @@ DEF_CLK(usdhc4_clk, CCGR6, CG4, &pll2_pfd_400m, NULL); | |||
1811 | DEF_CLK(emi_slow_clk, CCGR6, CG5, &axi_clk, NULL); | 1879 | DEF_CLK(emi_slow_clk, CCGR6, CG5, &axi_clk, NULL); |
1812 | DEF_CLK(vdo_axi_clk, CCGR6, CG6, &axi_clk, NULL); | 1880 | DEF_CLK(vdo_axi_clk, CCGR6, CG6, &axi_clk, NULL); |
1813 | DEF_CLK(vpu_clk, CCGR6, CG7, &axi_clk, NULL); | 1881 | DEF_CLK(vpu_clk, CCGR6, CG7, &axi_clk, NULL); |
1882 | DEF_CLK_1B(cko1_clk, CCOSR, BP_CCOSR_CKO1_EN, &pll2_bus, NULL); | ||
1814 | 1883 | ||
1815 | static int pcie_clk_enable(struct clk *clk) | 1884 | static int pcie_clk_enable(struct clk *clk) |
1816 | { | 1885 | { |
@@ -1922,6 +1991,7 @@ static struct clk_lookup lookups[] = { | |||
1922 | _REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk), | 1991 | _REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk), |
1923 | _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk), | 1992 | _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk), |
1924 | _REGISTER_CLOCK(NULL, "sata_clk", sata_clk), | 1993 | _REGISTER_CLOCK(NULL, "sata_clk", sata_clk), |
1994 | _REGISTER_CLOCK(NULL, "cko1_clk", cko1_clk), | ||
1925 | }; | 1995 | }; |
1926 | 1996 | ||
1927 | int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) | 1997 | int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) |
@@ -2029,6 +2099,8 @@ int __init mx6q_clocks_init(void) | |||
2029 | clk_set_rate(&usdhc3_clk, 49500000); | 2099 | clk_set_rate(&usdhc3_clk, 49500000); |
2030 | clk_set_rate(&usdhc4_clk, 49500000); | 2100 | clk_set_rate(&usdhc4_clk, 49500000); |
2031 | 2101 | ||
2102 | clk_set_parent(&cko1_clk, &ahb_clk); | ||
2103 | |||
2032 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); | 2104 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); |
2033 | base = of_iomap(np, 0); | 2105 | base = of_iomap(np, 0); |
2034 | WARN_ON(!base); | 2106 | WARN_ON(!base); |
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c index d4ab6f29a766..0213f8dcee81 100644 --- a/arch/arm/mach-imx/lluart.c +++ b/arch/arm/mach-imx/lluart.c | |||
@@ -17,7 +17,7 @@ | |||
17 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
18 | 18 | ||
19 | static struct map_desc imx_lluart_desc = { | 19 | static struct map_desc imx_lluart_desc = { |
20 | #ifdef CONFIG_DEBUG_IMX6Q_UART | 20 | #ifdef CONFIG_DEBUG_IMX6Q_UART4 |
21 | .virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR), | 21 | .virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR), |
22 | .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), | 22 | .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), |
23 | .length = MX6Q_UART4_SIZE, | 23 | .length = MX6Q_UART4_SIZE, |