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authorShawn Guo <shawn.guo@linaro.org>2011-06-22 10:41:30 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-07-07 04:01:12 -0400
commit3622360430e90d47a0d028dd5333a13771589331 (patch)
treea2a4df6d905d4157bf0e3cb5e5d6b3b5d481d0b6 /arch/arm/mach-imx
parent8dd7b817a1135940406a3271346a4a8e39e2b87c (diff)
ARM: mxc: clean up imx-dma device registration
The patch follows the implementation of gpio-mxc device registration to break the concentrated imx-dma device registration into soc specific setup function. Then we can avoid the churn of "#ifdef" and the cpu_is_mx checking on such a long list, which makes no sense, considering more soc supports need to be added and we need to support single image for multiple socs in the long run. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/mm-imx21.c3
-rw-r--r--arch/arm/mach-imx/mm-imx25.c26
-rw-r--r--arch/arm/mach-imx/mm-imx27.c3
-rw-r--r--arch/arm/mach-imx/mm-imx31.c24
-rw-r--r--arch/arm/mach-imx/mm-imx35.c44
5 files changed, 100 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index f8fb41ce68d1..4f32a8a9aeed 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -22,6 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/common.h> 24#include <mach/common.h>
25#include <mach/devices-common.h>
25#include <asm/pgtable.h> 26#include <asm/pgtable.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <mach/irqs.h> 28#include <mach/irqs.h>
@@ -82,4 +83,6 @@ void __init imx21_soc_init(void)
82 mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 83 mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
83 mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 84 mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
84 mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 85 mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
86
87 imx_add_imx_dma();
85} 88}
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index 1b6d583f750a..0c545207ce00 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -24,6 +24,7 @@
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/devices-common.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <mach/mx25.h> 29#include <mach/mx25.h>
29#include <mach/iomux-v3.h> 30#include <mach/iomux-v3.h>
@@ -61,10 +62,35 @@ void __init mx25_init_irq(void)
61 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); 62 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR));
62} 63}
63 64
65static struct sdma_script_start_addrs imx25_sdma_script __initdata = {
66 .ap_2_ap_addr = 729,
67 .uart_2_mcu_addr = 904,
68 .per_2_app_addr = 1255,
69 .mcu_2_app_addr = 834,
70 .uartsh_2_mcu_addr = 1120,
71 .per_2_shp_addr = 1329,
72 .mcu_2_shp_addr = 1048,
73 .ata_2_mcu_addr = 1560,
74 .mcu_2_ata_addr = 1479,
75 .app_2_per_addr = 1189,
76 .app_2_mcu_addr = 770,
77 .shp_2_per_addr = 1407,
78 .shp_2_mcu_addr = 979,
79};
80
81static struct sdma_platform_data imx25_sdma_pdata __initdata = {
82 .sdma_version = 2,
83 .cpu_name = "imx25",
84 .to_version = 1,
85 .script_addrs = &imx25_sdma_script,
86};
87
64void __init imx25_soc_init(void) 88void __init imx25_soc_init(void)
65{ 89{
66 mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); 90 mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
67 mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); 91 mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
68 mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); 92 mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
69 mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); 93 mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
94
95 imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
70} 96}
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index acc6db45439e..944e02d3ccc2 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -22,6 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/common.h> 24#include <mach/common.h>
25#include <mach/devices-common.h>
25#include <asm/pgtable.h> 26#include <asm/pgtable.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <mach/irqs.h> 28#include <mach/irqs.h>
@@ -82,4 +83,6 @@ void __init imx27_soc_init(void)
82 mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); 83 mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
83 mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); 84 mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
84 mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); 85 mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
86
87 imx_add_imx_dma();
85} 88}
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c
index cb16ac661776..6af8519d3d6c 100644
--- a/arch/arm/mach-imx/mm-imx31.c
+++ b/arch/arm/mach-imx/mm-imx31.c
@@ -24,6 +24,7 @@
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/devices-common.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <mach/iomux-v3.h> 29#include <mach/iomux-v3.h>
29#include <mach/irqs.h> 30#include <mach/irqs.h>
@@ -57,9 +58,32 @@ void __init mx31_init_irq(void)
57 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); 58 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
58} 59}
59 60
61static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
62 .per_2_per_addr = 1677,
63};
64
65static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = {
66 .ap_2_ap_addr = 423,
67 .ap_2_bp_addr = 829,
68 .bp_2_ap_addr = 1029,
69};
70
71static struct sdma_platform_data imx31_sdma_pdata __initdata = {
72 .sdma_version = 1,
73 .cpu_name = "imx31",
74 .script_addrs = &imx31_to2_sdma_script,
75};
76
60void __init imx31_soc_init(void) 77void __init imx31_soc_init(void)
61{ 78{
79 int to_version = mx31_revision() >> 4;
80
62 mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); 81 mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
63 mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); 82 mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
64 mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); 83 mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
84
85 imx31_sdma_pdata.to_version = to_version;
86 if (to_version == 1)
87 imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script;
88 imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
65} 89}
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c
index 648bfca0163e..9891adb52458 100644
--- a/arch/arm/mach-imx/mm-imx35.c
+++ b/arch/arm/mach-imx/mm-imx35.c
@@ -25,6 +25,7 @@
25#include <asm/hardware/cache-l2x0.h> 25#include <asm/hardware/cache-l2x0.h>
26 26
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/devices-common.h>
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/iomux-v3.h> 30#include <mach/iomux-v3.h>
30#include <mach/irqs.h> 31#include <mach/irqs.h>
@@ -54,9 +55,52 @@ void __init mx35_init_irq(void)
54 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); 55 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
55} 56}
56 57
58static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
59 .ap_2_ap_addr = 642,
60 .uart_2_mcu_addr = 817,
61 .mcu_2_app_addr = 747,
62 .uartsh_2_mcu_addr = 1183,
63 .per_2_shp_addr = 1033,
64 .mcu_2_shp_addr = 961,
65 .ata_2_mcu_addr = 1333,
66 .mcu_2_ata_addr = 1252,
67 .app_2_mcu_addr = 683,
68 .shp_2_per_addr = 1111,
69 .shp_2_mcu_addr = 892,
70};
71
72static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = {
73 .ap_2_ap_addr = 729,
74 .uart_2_mcu_addr = 904,
75 .per_2_app_addr = 1597,
76 .mcu_2_app_addr = 834,
77 .uartsh_2_mcu_addr = 1270,
78 .per_2_shp_addr = 1120,
79 .mcu_2_shp_addr = 1048,
80 .ata_2_mcu_addr = 1429,
81 .mcu_2_ata_addr = 1339,
82 .app_2_per_addr = 1531,
83 .app_2_mcu_addr = 770,
84 .shp_2_per_addr = 1198,
85 .shp_2_mcu_addr = 979,
86};
87
88static struct sdma_platform_data imx35_sdma_pdata __initdata = {
89 .sdma_version = 2,
90 .cpu_name = "imx35",
91 .script_addrs = &imx35_to2_sdma_script,
92};
93
57void __init imx35_soc_init(void) 94void __init imx35_soc_init(void)
58{ 95{
96 int to_version = mx35_revision() >> 4;
97
59 mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); 98 mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
60 mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); 99 mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
61 mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); 100 mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
101
102 imx35_sdma_pdata.to_version = to_version;
103 if (to_version == 1)
104 imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script;
105 imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
62} 106}