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authorSascha Hauer <s.hauer@pengutronix.de>2012-05-16 06:29:53 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2012-05-16 06:46:09 -0400
commit2cfb45188a997ba4c3348e98a999b36663a4646f (patch)
tree4ba4e5f29e8b22e3ccf108fcde09d0dd0dec3a69 /arch/arm/mach-imx
parent1f152b48eaaf4918047e84777b01a6d687f066e9 (diff)
ARM i.MX: remove now unnecessary argument from mxc_timer_init
As the timer code now does a clk_get to get its clock we don't need the struct clk argument anymore. This also changes the alternative EPIT timer to do a clk_get. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/clk-imx1.c3
-rw-r--r--arch/arm/mach-imx/clk-imx21.c4
-rw-r--r--arch/arm/mach-imx/clk-imx25.c2
-rw-r--r--arch/arm/mach-imx/clk-imx27.c3
-rw-r--r--arch/arm/mach-imx/clk-imx31.c3
-rw-r--r--arch/arm/mach-imx/clk-imx35.c6
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c6
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c2
8 files changed, 11 insertions, 18 deletions
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 0f0beb580b73..516ddee1948e 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -108,8 +108,7 @@ int __init mx1_clocks_init(unsigned long fref)
108 clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0"); 108 clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
109 clk_register_clkdev(clk[clko], "clko", NULL); 109 clk_register_clkdev(clk[clko], "clko", NULL);
110 110
111 mxc_timer_init(NULL, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), 111 mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
112 MX1_TIM1_INT);
113 112
114 return 0; 113 return 0;
115} 114}
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index 4e4f384ee8dd..ea13e61bd5f3 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -180,7 +180,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
180 clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL); 180 clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL);
181 clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL); 181 clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL);
182 182
183 mxc_timer_init(NULL, MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR), 183 mxc_timer_init(MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR), MX21_INT_GPT1);
184 MX21_INT_GPT1); 184
185 return 0; 185 return 0;
186} 186}
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d9833bb5fd61..fdd8cc87c9fe 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -243,6 +243,6 @@ int __init mx25_clocks_init(void)
243 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); 243 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
244 clk_register_clkdev(clk[iim_ipg], "iim", NULL); 244 clk_register_clkdev(clk[iim_ipg], "iim", NULL);
245 245
246 mxc_timer_init(NULL, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 246 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
247 return 0; 247 return 0;
248} 248}
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 50a7ebd8d1b2..295cbd7c08dc 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -263,8 +263,7 @@ int __init mx27_clocks_init(unsigned long fref)
263 clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0"); 263 clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");
264 clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1"); 264 clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");
265 265
266 mxc_timer_init(NULL, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), 266 mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
267 MX27_INT_GPT1);
268 267
269 clk_prepare_enable(clk[emi_ahb_gate]); 268 clk_prepare_enable(clk[emi_ahb_gate]);
270 269
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index a854b9cae5ea..c9a06d800f8e 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -175,8 +175,7 @@ int __init mx31_clocks_init(unsigned long fref)
175 mx31_revision(); 175 mx31_revision();
176 clk_disable_unprepare(clk[iim_gate]); 176 clk_disable_unprepare(clk[iim_gate]);
177 177
178 mxc_timer_init(NULL, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), 178 mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
179 MX31_INT_GPT);
180 179
181 return 0; 180 return 0;
182} 181}
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index a9e60bf7dd75..920a8cc42726 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -267,11 +267,9 @@ int __init mx35_clocks_init()
267 imx_print_silicon_rev("i.MX35", mx35_revision()); 267 imx_print_silicon_rev("i.MX35", mx35_revision());
268 268
269#ifdef CONFIG_MXC_USE_EPIT 269#ifdef CONFIG_MXC_USE_EPIT
270 epit_timer_init(&epit1_clk, 270 epit_timer_init(MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
271 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
272#else 271#else
273 mxc_timer_init(NULL, MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), 272 mxc_timer_init(MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
274 MX35_INT_GPT);
275#endif 273#endif
276 274
277 return 0; 275 return 0;
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 1e7828d6be95..c1739f6078d5 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -329,8 +329,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
329 clk_set_rate(clk[esdhc_b_podf], 166250000); 329 clk_set_rate(clk[esdhc_b_podf], 166250000);
330 330
331 /* System timer */ 331 /* System timer */
332 mxc_timer_init(NULL, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), 332 mxc_timer_init(MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), MX51_INT_GPT);
333 MX51_INT_GPT);
334 333
335 clk_prepare_enable(clk[iim_gate]); 334 clk_prepare_enable(clk[iim_gate]);
336 imx_print_silicon_rev("i.MX51", mx51_revision()); 335 imx_print_silicon_rev("i.MX51", mx51_revision());
@@ -412,8 +411,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
412 clk_set_rate(clk[esdhc_b_podf], 200000000); 411 clk_set_rate(clk[esdhc_b_podf], 200000000);
413 412
414 /* System timer */ 413 /* System timer */
415 mxc_timer_init(NULL, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), 414 mxc_timer_init(MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), MX53_INT_GPT);
416 MX53_INT_GPT);
417 415
418 clk_prepare_enable(clk[iim_gate]); 416 clk_prepare_enable(clk[iim_gate]);
419 imx_print_silicon_rev("i.MX53", mx53_revision()); 417 imx_print_silicon_rev("i.MX53", mx53_revision());
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index f40a35da2e5c..24324f2dac95 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -433,7 +433,7 @@ int __init mx6q_clocks_init(void)
433 base = of_iomap(np, 0); 433 base = of_iomap(np, 0);
434 WARN_ON(!base); 434 WARN_ON(!base);
435 irq = irq_of_parse_and_map(np, 0); 435 irq = irq_of_parse_and_map(np, 0);
436 mxc_timer_init(NULL, base, irq); 436 mxc_timer_init(base, irq);
437 437
438 return 0; 438 return 0;
439} 439}