diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-06-20 11:34:32 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-08-16 01:11:19 -0400 |
commit | 12da484485b0ae0cd1588ade3904c1f647ab58cd (patch) | |
tree | f993c56e6259b366b95197b6e9a30550e188e5ae /arch/arm/mach-imx | |
parent | 14078291d89b9a1294618b649c856f4de9ef642f (diff) |
ARM: i.MX6: add ethernet phy fixup for AR8031
The AR8031 is used on the i.MX6 based sabreSD, sabreauto and wandboard.
All need the same fixup, so add it for all i.MX6.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r-- | arch/arm/mach-imx/mach-imx6q.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 7f238465765f..57f350cd66b4 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c | |||
@@ -115,6 +115,29 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev) | |||
115 | return 0; | 115 | return 0; |
116 | } | 116 | } |
117 | 117 | ||
118 | static int ar8031_phy_fixup(struct phy_device *dev) | ||
119 | { | ||
120 | u16 val; | ||
121 | |||
122 | /* To enable AR8031 output a 125MHz clk from CLK_25M */ | ||
123 | phy_write(dev, 0xd, 0x7); | ||
124 | phy_write(dev, 0xe, 0x8016); | ||
125 | phy_write(dev, 0xd, 0x4007); | ||
126 | |||
127 | val = phy_read(dev, 0xe); | ||
128 | val &= 0xffe3; | ||
129 | val |= 0x18; | ||
130 | phy_write(dev, 0xe, val); | ||
131 | |||
132 | /* introduce tx clock delay */ | ||
133 | phy_write(dev, 0x1d, 0x5); | ||
134 | val = phy_read(dev, 0x1e); | ||
135 | val |= 0x0100; | ||
136 | phy_write(dev, 0x1e, val); | ||
137 | |||
138 | return 0; | ||
139 | } | ||
140 | |||
118 | static void __init imx6q_sabrelite_cko1_setup(void) | 141 | static void __init imx6q_sabrelite_cko1_setup(void) |
119 | { | 142 | { |
120 | struct clk *cko1_sel, *ahb, *cko1; | 143 | struct clk *cko1_sel, *ahb, *cko1; |
@@ -139,11 +162,15 @@ put_clk: | |||
139 | clk_put(cko1); | 162 | clk_put(cko1); |
140 | } | 163 | } |
141 | 164 | ||
165 | #define PHY_ID_AR8031 0x004dd074 | ||
166 | |||
142 | static void __init imx6q_enet_phy_init(void) | 167 | static void __init imx6q_enet_phy_init(void) |
143 | { | 168 | { |
144 | if (IS_BUILTIN(CONFIG_PHYLIB)) { | 169 | if (IS_BUILTIN(CONFIG_PHYLIB)) { |
145 | phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, | 170 | phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, |
146 | ksz9021rn_phy_fixup); | 171 | ksz9021rn_phy_fixup); |
172 | phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff, | ||
173 | ar8031_phy_fixup); | ||
147 | } | 174 | } |
148 | } | 175 | } |
149 | 176 | ||