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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-27 22:04:36 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-27 22:04:36 -0400
commite3e1288e86a07cdeb0aee5860a2dff111c6eff79 (patch)
treecd22f8051a456c9d2b95698b6fe402776a67469b /arch/arm/mach-imx
parent9ae6d039224def926656206725ae6e89d1331417 (diff)
parent964dc256bb91e990277010a3f6dc66daa130be8b (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits) DMAENGINE: move COH901318 to arch_initcall dma: imx-dma: fix signedness bug dma/timberdale: simplify conditional ste_dma40: remove channel_type ste_dma40: remove enum for endianess ste_dma40: remove TIM_FOR_LINK option ste_dma40: move mode_opt to separate config ste_dma40: move channel mode to a separate field ste_dma40: move priority to separate field ste_dma40: add variable to indicate valid dma_cfg async_tx: make async_tx channel switching opt-in move async raid6 test to lib/Kconfig.debug dmaengine: Add Freescale i.MX1/21/27 DMA driver intel_mid_dma: change the slave interface intel_mid_dma: fix the WARN_ONs intel_mid_dma: Add sg list support to DMA driver intel_mid_dma: Allow DMAC2 to share interrupt intel_mid_dma: Allow IRQ sharing intel_mid_dma: Add runtime PM support DMAENGINE: define a dummy filter function for ste_dma40 ...
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/include/mach/dma-v1.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/include/mach/dma-v1.h b/arch/arm/mach-imx/include/mach/dma-v1.h
index 287431cc13e5..ac6fd713828a 100644
--- a/arch/arm/mach-imx/include/mach/dma-v1.h
+++ b/arch/arm/mach-imx/include/mach/dma-v1.h
@@ -27,6 +27,8 @@
27 27
28#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) 28#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
29 29
30#include <mach/dma.h>
31
30#define IMX_DMA_CHANNELS 16 32#define IMX_DMA_CHANNELS 16
31 33
32#define DMA_MODE_READ 0 34#define DMA_MODE_READ 0
@@ -96,12 +98,6 @@ int imx_dma_request(int channel, const char *name);
96 98
97void imx_dma_free(int channel); 99void imx_dma_free(int channel);
98 100
99enum imx_dma_prio {
100 DMA_PRIO_HIGH = 0,
101 DMA_PRIO_MEDIUM = 1,
102 DMA_PRIO_LOW = 2
103};
104
105int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio); 101int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
106 102
107#endif /* __MACH_DMA_V1_H__ */ 103#endif /* __MACH_DMA_V1_H__ */