diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-12-05 18:20:17 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-12-05 18:20:17 -0500 |
commit | 742eaa6a6e356a16788ce6530271de89bc4f8fb5 (patch) | |
tree | 12fc040daab06ac796c61c1d92bfad9bb054d1c1 /arch/arm/mach-imx | |
parent | ba8bb18a03f8c7508565c385576a5431a4ad804a (diff) | |
parent | ae72fd588a2b302222769b44775912b83f0785eb (diff) |
Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
Conflicts:
arch/arm/common/gic.c
arch/arm/plat-omap/include/plat/common.h
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r-- | arch/arm/mach-imx/Kconfig | 13 | ||||
-rw-r--r-- | arch/arm/mach-imx/clock-imx6q.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-imx/mach-imx6q.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx3.c | 109 | ||||
-rw-r--r-- | arch/arm/mach-imx/src.c | 7 |
5 files changed, 71 insertions, 66 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 5f7f9c2a34ae..c44aa974e79c 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC | |||
10 | config HAVE_IMX_SRC | 10 | config HAVE_IMX_SRC |
11 | bool | 11 | bool |
12 | 12 | ||
13 | # | ||
14 | # ARCH_MX31 and ARCH_MX35 are left for compatibility | ||
15 | # Some usages assume that having one of them implies not having (e.g.) ARCH_MX2. | ||
16 | # To easily distinguish good and reviewed from unreviewed usages new (and IMHO | ||
17 | # more sensible) names are used: SOC_IMX31 and SOC_IMX35 | ||
18 | config ARCH_MX1 | 13 | config ARCH_MX1 |
19 | bool | 14 | bool |
20 | 15 | ||
@@ -27,12 +22,6 @@ config ARCH_MX25 | |||
27 | config MACH_MX27 | 22 | config MACH_MX27 |
28 | bool | 23 | bool |
29 | 24 | ||
30 | config ARCH_MX31 | ||
31 | bool | ||
32 | |||
33 | config ARCH_MX35 | ||
34 | bool | ||
35 | |||
36 | config SOC_IMX1 | 25 | config SOC_IMX1 |
37 | bool | 26 | bool |
38 | select ARCH_MX1 | 27 | select ARCH_MX1 |
@@ -72,7 +61,6 @@ config SOC_IMX31 | |||
72 | select CPU_V6 | 61 | select CPU_V6 |
73 | select IMX_HAVE_PLATFORM_MXC_RNGA | 62 | select IMX_HAVE_PLATFORM_MXC_RNGA |
74 | select ARCH_MXC_AUDMUX_V2 | 63 | select ARCH_MXC_AUDMUX_V2 |
75 | select ARCH_MX31 | ||
76 | select MXC_AVIC | 64 | select MXC_AVIC |
77 | select SMP_ON_UP if SMP | 65 | select SMP_ON_UP if SMP |
78 | 66 | ||
@@ -82,7 +70,6 @@ config SOC_IMX35 | |||
82 | select ARCH_MXC_IOMUX_V3 | 70 | select ARCH_MXC_IOMUX_V3 |
83 | select ARCH_MXC_AUDMUX_V2 | 71 | select ARCH_MXC_AUDMUX_V2 |
84 | select HAVE_EPIT | 72 | select HAVE_EPIT |
85 | select ARCH_MX35 | ||
86 | select MXC_AVIC | 73 | select MXC_AVIC |
87 | select SMP_ON_UP if SMP | 74 | select SMP_ON_UP if SMP |
88 | 75 | ||
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 613a1b993bff..039a7abb165a 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c | |||
@@ -1953,14 +1953,17 @@ static struct map_desc imx6q_clock_desc[] = { | |||
1953 | imx_map_entry(MX6Q, ANATOP, MT_DEVICE), | 1953 | imx_map_entry(MX6Q, ANATOP, MT_DEVICE), |
1954 | }; | 1954 | }; |
1955 | 1955 | ||
1956 | void __init imx6q_clock_map_io(void) | ||
1957 | { | ||
1958 | iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc)); | ||
1959 | } | ||
1960 | |||
1956 | int __init mx6q_clocks_init(void) | 1961 | int __init mx6q_clocks_init(void) |
1957 | { | 1962 | { |
1958 | struct device_node *np; | 1963 | struct device_node *np; |
1959 | void __iomem *base; | 1964 | void __iomem *base; |
1960 | int i, irq; | 1965 | int i, irq; |
1961 | 1966 | ||
1962 | iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc)); | ||
1963 | |||
1964 | /* retrieve the freqency of fixed clocks from device tree */ | 1967 | /* retrieve the freqency of fixed clocks from device tree */ |
1965 | for_each_compatible_node(np, NULL, "fixed-clock") { | 1968 | for_each_compatible_node(np, NULL, "fixed-clock") { |
1966 | u32 rate; | 1969 | u32 rate; |
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 8bf5fa349484..9cd860a27af5 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c | |||
@@ -34,6 +34,7 @@ static void __init imx6q_map_io(void) | |||
34 | { | 34 | { |
35 | imx_lluart_map_io(); | 35 | imx_lluart_map_io(); |
36 | imx_scu_map_io(); | 36 | imx_scu_map_io(); |
37 | imx6q_clock_map_io(); | ||
37 | } | 38 | } |
38 | 39 | ||
39 | static void __init imx6q_gpio_add_irq_domain(struct device_node *np, | 40 | static void __init imx6q_gpio_add_irq_domain(struct device_node *np, |
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 9f0e82ec3398..31807d2a8b7b 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c | |||
@@ -33,29 +33,32 @@ | |||
33 | static void imx3_idle(void) | 33 | static void imx3_idle(void) |
34 | { | 34 | { |
35 | unsigned long reg = 0; | 35 | unsigned long reg = 0; |
36 | __asm__ __volatile__( | 36 | |
37 | /* disable I and D cache */ | 37 | if (!need_resched()) |
38 | "mrc p15, 0, %0, c1, c0, 0\n" | 38 | __asm__ __volatile__( |
39 | "bic %0, %0, #0x00001000\n" | 39 | /* disable I and D cache */ |
40 | "bic %0, %0, #0x00000004\n" | 40 | "mrc p15, 0, %0, c1, c0, 0\n" |
41 | "mcr p15, 0, %0, c1, c0, 0\n" | 41 | "bic %0, %0, #0x00001000\n" |
42 | /* invalidate I cache */ | 42 | "bic %0, %0, #0x00000004\n" |
43 | "mov %0, #0\n" | 43 | "mcr p15, 0, %0, c1, c0, 0\n" |
44 | "mcr p15, 0, %0, c7, c5, 0\n" | 44 | /* invalidate I cache */ |
45 | /* clear and invalidate D cache */ | 45 | "mov %0, #0\n" |
46 | "mov %0, #0\n" | 46 | "mcr p15, 0, %0, c7, c5, 0\n" |
47 | "mcr p15, 0, %0, c7, c14, 0\n" | 47 | /* clear and invalidate D cache */ |
48 | /* WFI */ | 48 | "mov %0, #0\n" |
49 | "mov %0, #0\n" | 49 | "mcr p15, 0, %0, c7, c14, 0\n" |
50 | "mcr p15, 0, %0, c7, c0, 4\n" | 50 | /* WFI */ |
51 | "nop\n" "nop\n" "nop\n" "nop\n" | 51 | "mov %0, #0\n" |
52 | "nop\n" "nop\n" "nop\n" | 52 | "mcr p15, 0, %0, c7, c0, 4\n" |
53 | /* enable I and D cache */ | 53 | "nop\n" "nop\n" "nop\n" "nop\n" |
54 | "mrc p15, 0, %0, c1, c0, 0\n" | 54 | "nop\n" "nop\n" "nop\n" |
55 | "orr %0, %0, #0x00001000\n" | 55 | /* enable I and D cache */ |
56 | "orr %0, %0, #0x00000004\n" | 56 | "mrc p15, 0, %0, c1, c0, 0\n" |
57 | "mcr p15, 0, %0, c1, c0, 0\n" | 57 | "orr %0, %0, #0x00001000\n" |
58 | : "=r" (reg)); | 58 | "orr %0, %0, #0x00000004\n" |
59 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
60 | : "=r" (reg)); | ||
61 | local_irq_enable(); | ||
59 | } | 62 | } |
60 | 63 | ||
61 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, | 64 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, |
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void) | |||
108 | l2x0_init(l2x0_base, 0x00030024, 0x00000000); | 111 | l2x0_init(l2x0_base, 0x00030024, 0x00000000); |
109 | } | 112 | } |
110 | 113 | ||
114 | #ifdef CONFIG_SOC_IMX31 | ||
111 | static struct map_desc mx31_io_desc[] __initdata = { | 115 | static struct map_desc mx31_io_desc[] __initdata = { |
112 | imx_map_entry(MX31, X_MEMC, MT_DEVICE), | 116 | imx_map_entry(MX31, X_MEMC, MT_DEVICE), |
113 | imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), | 117 | imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), |
@@ -126,33 +130,11 @@ void __init mx31_map_io(void) | |||
126 | iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); | 130 | iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); |
127 | } | 131 | } |
128 | 132 | ||
129 | static struct map_desc mx35_io_desc[] __initdata = { | ||
130 | imx_map_entry(MX35, X_MEMC, MT_DEVICE), | ||
131 | imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), | ||
132 | imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), | ||
133 | imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), | ||
134 | imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), | ||
135 | }; | ||
136 | |||
137 | void __init mx35_map_io(void) | ||
138 | { | ||
139 | iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); | ||
140 | } | ||
141 | |||
142 | void __init imx31_init_early(void) | 133 | void __init imx31_init_early(void) |
143 | { | 134 | { |
144 | mxc_set_cpu_type(MXC_CPU_MX31); | 135 | mxc_set_cpu_type(MXC_CPU_MX31); |
145 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | 136 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
146 | imx_idle = imx3_idle; | 137 | pm_idle = imx3_idle; |
147 | imx_ioremap = imx3_ioremap; | ||
148 | } | ||
149 | |||
150 | void __init imx35_init_early(void) | ||
151 | { | ||
152 | mxc_set_cpu_type(MXC_CPU_MX35); | ||
153 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); | ||
154 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | ||
155 | imx_idle = imx3_idle; | ||
156 | imx_ioremap = imx3_ioremap; | 138 | imx_ioremap = imx3_ioremap; |
157 | } | 139 | } |
158 | 140 | ||
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void) | |||
161 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); | 143 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); |
162 | } | 144 | } |
163 | 145 | ||
164 | void __init mx35_init_irq(void) | ||
165 | { | ||
166 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); | ||
167 | } | ||
168 | |||
169 | static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { | 146 | static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { |
170 | .per_2_per_addr = 1677, | 147 | .per_2_per_addr = 1677, |
171 | }; | 148 | }; |
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void) | |||
199 | 176 | ||
200 | imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); | 177 | imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); |
201 | } | 178 | } |
179 | #endif /* ifdef CONFIG_SOC_IMX31 */ | ||
180 | |||
181 | #ifdef CONFIG_SOC_IMX35 | ||
182 | static struct map_desc mx35_io_desc[] __initdata = { | ||
183 | imx_map_entry(MX35, X_MEMC, MT_DEVICE), | ||
184 | imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), | ||
185 | imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), | ||
186 | imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), | ||
187 | imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), | ||
188 | }; | ||
189 | |||
190 | void __init mx35_map_io(void) | ||
191 | { | ||
192 | iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); | ||
193 | } | ||
194 | |||
195 | void __init imx35_init_early(void) | ||
196 | { | ||
197 | mxc_set_cpu_type(MXC_CPU_MX35); | ||
198 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); | ||
199 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | ||
200 | pm_idle = imx3_idle; | ||
201 | imx_ioremap = imx3_ioremap; | ||
202 | } | ||
203 | |||
204 | void __init mx35_init_irq(void) | ||
205 | { | ||
206 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); | ||
207 | } | ||
202 | 208 | ||
203 | static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { | 209 | static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { |
204 | .ap_2_ap_addr = 642, | 210 | .ap_2_ap_addr = 642, |
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void) | |||
254 | 260 | ||
255 | imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); | 261 | imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); |
256 | } | 262 | } |
263 | #endif /* ifdef CONFIG_SOC_IMX35 */ | ||
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index 36cacbd0dcc2..a8e33681b732 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/of.h> | 15 | #include <linux/of.h> |
16 | #include <linux/of_address.h> | 16 | #include <linux/of_address.h> |
17 | #include <linux/smp.h> | ||
17 | #include <asm/unified.h> | 18 | #include <asm/unified.h> |
18 | 19 | ||
19 | #define SRC_SCR 0x000 | 20 | #define SRC_SCR 0x000 |
@@ -23,10 +24,15 @@ | |||
23 | 24 | ||
24 | static void __iomem *src_base; | 25 | static void __iomem *src_base; |
25 | 26 | ||
27 | #ifndef CONFIG_SMP | ||
28 | #define cpu_logical_map(cpu) 0 | ||
29 | #endif | ||
30 | |||
26 | void imx_enable_cpu(int cpu, bool enable) | 31 | void imx_enable_cpu(int cpu, bool enable) |
27 | { | 32 | { |
28 | u32 mask, val; | 33 | u32 mask, val; |
29 | 34 | ||
35 | cpu = cpu_logical_map(cpu); | ||
30 | mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1); | 36 | mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1); |
31 | val = readl_relaxed(src_base + SRC_SCR); | 37 | val = readl_relaxed(src_base + SRC_SCR); |
32 | val = enable ? val | mask : val & ~mask; | 38 | val = enable ? val | mask : val & ~mask; |
@@ -35,6 +41,7 @@ void imx_enable_cpu(int cpu, bool enable) | |||
35 | 41 | ||
36 | void imx_set_cpu_jump(int cpu, void *jump_addr) | 42 | void imx_set_cpu_jump(int cpu, void *jump_addr) |
37 | { | 43 | { |
44 | cpu = cpu_logical_map(cpu); | ||
38 | writel_relaxed(BSYM(virt_to_phys(jump_addr)), | 45 | writel_relaxed(BSYM(virt_to_phys(jump_addr)), |
39 | src_base + SRC_GPR1 + cpu * 8); | 46 | src_base + SRC_GPR1 + cpu * 8); |
40 | } | 47 | } |