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authorCatalin Marinas <catalin.marinas@arm.com>2013-01-14 13:05:37 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2013-03-26 12:12:02 -0400
commitc0114709ed85a5693eb74acdfa03d94f7f12e5b8 (patch)
tree372c5cee96580d73e638d25a2b169a64b82bc908 /arch/arm/mach-imx/platsmp.c
parentaec0095653cd9812b9a15df0315364cc6d094c59 (diff)
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Tested-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Barry Song <baohua.song@csr.com>
Diffstat (limited to 'arch/arm/mach-imx/platsmp.c')
-rw-r--r--arch/arm/mach-imx/platsmp.c12
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 7c0b03f67b05..77e9a25ed0f6 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -12,7 +12,6 @@
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <linux/irqchip/arm-gic.h>
16#include <asm/page.h> 15#include <asm/page.h>
17#include <asm/smp_scu.h> 16#include <asm/smp_scu.h>
18#include <asm/mach/map.h> 17#include <asm/mach/map.h>
@@ -52,16 +51,6 @@ void imx_scu_standby_enable(void)
52 writel_relaxed(val, scu_base); 51 writel_relaxed(val, scu_base);
53} 52}
54 53
55static void __cpuinit imx_secondary_init(unsigned int cpu)
56{
57 /*
58 * if any interrupts are already enabled for the primary
59 * core (e.g. timer irq), then they will not have been enabled
60 * for us: do so
61 */
62 gic_secondary_init(0);
63}
64
65static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle) 54static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
66{ 55{
67 imx_set_cpu_jump(cpu, v7_secondary_startup); 56 imx_set_cpu_jump(cpu, v7_secondary_startup);
@@ -96,7 +85,6 @@ static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
96struct smp_operations imx_smp_ops __initdata = { 85struct smp_operations imx_smp_ops __initdata = {
97 .smp_init_cpus = imx_smp_init_cpus, 86 .smp_init_cpus = imx_smp_init_cpus,
98 .smp_prepare_cpus = imx_smp_prepare_cpus, 87 .smp_prepare_cpus = imx_smp_prepare_cpus,
99 .smp_secondary_init = imx_secondary_init,
100 .smp_boot_secondary = imx_boot_secondary, 88 .smp_boot_secondary = imx_boot_secondary,
101#ifdef CONFIG_HOTPLUG_CPU 89#ifdef CONFIG_HOTPLUG_CPU
102 .cpu_die = imx_cpu_die, 90 .cpu_die = imx_cpu_die,