Merge branch 'for-armsoc' of git://git.linaro.org/people/rmk/linux-arm

Pull #1 ARM updates from Russell King:
 "This one covers stuff which Arnd is waiting for me to push, as this is
  shared between both our trees and probably other trees elsewhere.

  Essentially, this contains:
   - AMBA primecell device initializer updates - mostly shrinking the
     size of the device declarations in platform code to something more
     reasonable.
   - Getting rid of the NO_IRQ crap from AMBA primecell stuff.
   - Nicolas' idle cleanups.  This in combination with the restart
     cleanups from the last merge window results in a great many
     mach/system.h files being deleted."

Yay: ~80 files, ~2000 lines deleted.

* 'for-armsoc' of git://git.linaro.org/people/rmk/linux-arm: (60 commits)
  ARM: remove disable_fiq and arch_ret_to_user macros
  ARM: make entry-macro.S depend on !MULTI_IRQ_HANDLER
  ARM: rpc: make default fiq handler run-time installed
  ARM: make arch_ret_to_user macro optional
  ARM: amba: samsung: use common amba device initializers
  ARM: amba: spear: use common amba device initializers
  ARM: amba: nomadik: use common amba device initializers
  ARM: amba: u300: use common amba device initializers
  ARM: amba: lpc32xx: use common amba device initializers
  ARM: amba: netx: use common amba device initializers
  ARM: amba: bcmring: use common amba device initializers
  ARM: amba: ep93xx: use common amba device initializers
  ARM: amba: omap2: use common amba device initializers
  ARM: amba: integrator: use common amba device initializers
  ARM: amba: realview: get rid of private platform amba_device initializer
  ARM: amba: versatile: get rid of private platform amba_device initializer
  ARM: amba: vexpress: get rid of private platform amba_device initializer
  ARM: amba: provide common initializers for static amba devices
  ARM: amba: make use of -1 IRQs warn
  ARM: amba: u300: get rid of NO_IRQ initializers
  ...

1 files changed, 25 insertions, 27 deletions

diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 2530c151b7b3..9c9b7f9f43dc 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -34,31 +34,29 @@ static void imx3_idle(void)
 {
         unsigned long reg = 0;
 
-        if (!need_resched())
-                __asm__ __volatile__(
-                        /* disable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "bic %0, %0, #0x00001000\n"
-                        "bic %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        /* invalidate I cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c5, 0\n"
-                        /* clear and invalidate D cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c14, 0\n"
-                        /* WFI */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c0, 4\n"
-                        "nop\n" "nop\n" "nop\n" "nop\n"
-                        "nop\n" "nop\n" "nop\n"
-                        /* enable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "orr %0, %0, #0x00001000\n"
-                        "orr %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        : "=r" (reg));
-        local_irq_enable();
+        __asm__ __volatile__(
+                /* disable I and D cache */
+                "mrc p15, 0, %0, c1, c0, 0\n"
+                "bic %0, %0, #0x00001000\n"
+                "bic %0, %0, #0x00000004\n"
+                "mcr p15, 0, %0, c1, c0, 0\n"
+                /* invalidate I cache */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c5, 0\n"
+                /* clear and invalidate D cache */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c14, 0\n"
+                /* WFI */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c0, 4\n"
+                "nop\n" "nop\n" "nop\n" "nop\n"
+                "nop\n" "nop\n" "nop\n"
+                /* enable I and D cache */
+                "mrc p15, 0, %0, c1, c0, 0\n"
+                "orr %0, %0, #0x00001000\n"
+                "orr %0, %0, #0x00000004\n"
+                "mcr p15, 0, %0, c1, c0, 0\n"
+                : "=r" (reg));
 }
 
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -134,8 +132,8 @@ void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
+        arm_pm_idle = imx3_idle;
 }
 
 void __init mx31_init_irq(void)
@@ -203,7 +201,7 @@ void __init imx35_init_early(void)
         mxc_set_cpu_type(MXC_CPU_MX35);
         mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-        pm_idle = imx3_idle;
+        arm_pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
 }