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authorShawn Guo <shawn.guo@linaro.org>2011-11-11 00:09:18 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2011-11-11 09:56:06 -0500
commit8c6d8319eca370f804fb8e1fcf7070b587d1b81d (patch)
tree739bd7d8011164daac5752418ab2fbca5687fcd6 /arch/arm/mach-imx/mm-imx3.c
parent6a53fc531dcf4719e80d0152ca044e35b0f92591 (diff)
arm/imx: remove imx_idle hook and use pm_idle instead
The patch removes imx_idle hook and use pm_idle instead to get imx arch_idle prepared for the cleanup. It's suggested by Russel King as below. > The final removal of mach/system.h depends on getting rid of the arch_idle > thing. While going through these headers, I was dismayed to find these: > > arch/arm/mach-s3c2410/include/mach/system.h:void (*s3c24xx_idle)(void); > arch/arm/plat-mxc/include/mach/system.h:extern void (*imx_idle)(void); > > when we have a perfectly good pm_idle hook already in place - so there's > no excuse for these especially when other platforms are already using > pm_idle to hook their platform specific idle function into. This is > something that better be gone at the next merge window! Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/mm-imx3.c')
-rw-r--r--arch/arm/mach-imx/mm-imx3.c53
1 files changed, 28 insertions, 25 deletions
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9f0e82ec3398..6d01de326f90 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -33,29 +33,32 @@
33static void imx3_idle(void) 33static void imx3_idle(void)
34{ 34{
35 unsigned long reg = 0; 35 unsigned long reg = 0;
36 __asm__ __volatile__( 36
37 /* disable I and D cache */ 37 if (!need_resched())
38 "mrc p15, 0, %0, c1, c0, 0\n" 38 __asm__ __volatile__(
39 "bic %0, %0, #0x00001000\n" 39 /* disable I and D cache */
40 "bic %0, %0, #0x00000004\n" 40 "mrc p15, 0, %0, c1, c0, 0\n"
41 "mcr p15, 0, %0, c1, c0, 0\n" 41 "bic %0, %0, #0x00001000\n"
42 /* invalidate I cache */ 42 "bic %0, %0, #0x00000004\n"
43 "mov %0, #0\n" 43 "mcr p15, 0, %0, c1, c0, 0\n"
44 "mcr p15, 0, %0, c7, c5, 0\n" 44 /* invalidate I cache */
45 /* clear and invalidate D cache */ 45 "mov %0, #0\n"
46 "mov %0, #0\n" 46 "mcr p15, 0, %0, c7, c5, 0\n"
47 "mcr p15, 0, %0, c7, c14, 0\n" 47 /* clear and invalidate D cache */
48 /* WFI */ 48 "mov %0, #0\n"
49 "mov %0, #0\n" 49 "mcr p15, 0, %0, c7, c14, 0\n"
50 "mcr p15, 0, %0, c7, c0, 4\n" 50 /* WFI */
51 "nop\n" "nop\n" "nop\n" "nop\n" 51 "mov %0, #0\n"
52 "nop\n" "nop\n" "nop\n" 52 "mcr p15, 0, %0, c7, c0, 4\n"
53 /* enable I and D cache */ 53 "nop\n" "nop\n" "nop\n" "nop\n"
54 "mrc p15, 0, %0, c1, c0, 0\n" 54 "nop\n" "nop\n" "nop\n"
55 "orr %0, %0, #0x00001000\n" 55 /* enable I and D cache */
56 "orr %0, %0, #0x00000004\n" 56 "mrc p15, 0, %0, c1, c0, 0\n"
57 "mcr p15, 0, %0, c1, c0, 0\n" 57 "orr %0, %0, #0x00001000\n"
58 : "=r" (reg)); 58 "orr %0, %0, #0x00000004\n"
59 "mcr p15, 0, %0, c1, c0, 0\n"
60 : "=r" (reg));
61 local_irq_enable();
59} 62}
60 63
61static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, 64static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -143,7 +146,7 @@ void __init imx31_init_early(void)
143{ 146{
144 mxc_set_cpu_type(MXC_CPU_MX31); 147 mxc_set_cpu_type(MXC_CPU_MX31);
145 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); 148 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
146 imx_idle = imx3_idle; 149 pm_idle = imx3_idle;
147 imx_ioremap = imx3_ioremap; 150 imx_ioremap = imx3_ioremap;
148} 151}
149 152
@@ -152,7 +155,7 @@ void __init imx35_init_early(void)
152 mxc_set_cpu_type(MXC_CPU_MX35); 155 mxc_set_cpu_type(MXC_CPU_MX35);
153 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); 156 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
154 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); 157 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
155 imx_idle = imx3_idle; 158 pm_idle = imx3_idle;
156 imx_ioremap = imx3_ioremap; 159 imx_ioremap = imx3_ioremap;
157} 160}
158 161