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authorShawn Guo <shawn.guo@linaro.org>2011-06-22 10:41:30 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-07-07 04:01:12 -0400
commit3622360430e90d47a0d028dd5333a13771589331 (patch)
treea2a4df6d905d4157bf0e3cb5e5d6b3b5d481d0b6 /arch/arm/mach-imx/mm-imx25.c
parent8dd7b817a1135940406a3271346a4a8e39e2b87c (diff)
ARM: mxc: clean up imx-dma device registration
The patch follows the implementation of gpio-mxc device registration to break the concentrated imx-dma device registration into soc specific setup function. Then we can avoid the churn of "#ifdef" and the cpu_is_mx checking on such a long list, which makes no sense, considering more soc supports need to be added and we need to support single image for multiple socs in the long run. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/mm-imx25.c')
-rw-r--r--arch/arm/mach-imx/mm-imx25.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index 1b6d583f750a..0c545207ce00 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -24,6 +24,7 @@
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/devices-common.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <mach/mx25.h> 29#include <mach/mx25.h>
29#include <mach/iomux-v3.h> 30#include <mach/iomux-v3.h>
@@ -61,10 +62,35 @@ void __init mx25_init_irq(void)
61 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); 62 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR));
62} 63}
63 64
65static struct sdma_script_start_addrs imx25_sdma_script __initdata = {
66 .ap_2_ap_addr = 729,
67 .uart_2_mcu_addr = 904,
68 .per_2_app_addr = 1255,
69 .mcu_2_app_addr = 834,
70 .uartsh_2_mcu_addr = 1120,
71 .per_2_shp_addr = 1329,
72 .mcu_2_shp_addr = 1048,
73 .ata_2_mcu_addr = 1560,
74 .mcu_2_ata_addr = 1479,
75 .app_2_per_addr = 1189,
76 .app_2_mcu_addr = 770,
77 .shp_2_per_addr = 1407,
78 .shp_2_mcu_addr = 979,
79};
80
81static struct sdma_platform_data imx25_sdma_pdata __initdata = {
82 .sdma_version = 2,
83 .cpu_name = "imx25",
84 .to_version = 1,
85 .script_addrs = &imx25_sdma_script,
86};
87
64void __init imx25_soc_init(void) 88void __init imx25_soc_init(void)
65{ 89{
66 mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); 90 mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
67 mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); 91 mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
68 mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); 92 mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
69 mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); 93 mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
94
95 imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
70} 96}