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authorShawn Guo <shawn.guo@linaro.org>2012-05-08 09:39:33 -0400
committerShawn Guo <shawn.guo@linaro.org>2012-05-11 03:17:56 -0400
commitef44180680aafb29f50654f3325cf7791fa5433d (patch)
treeb36296d76094b2a3cccb7326a7d92b422c9c7698 /arch/arm/mach-imx/mach-imx6q.c
parent071dea508f72e879041bd68b56aad41befb2dd45 (diff)
ARM: imx6q: register phy fixup only when CONFIG_PHYLIB is enabled
It fixes the following compile error with network disabled in imx_v6_v7_defconfig. arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup': imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write' arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine': imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid' make: *** [.tmp_vmlinux1] Error 1 Reported-by: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6q.c')
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 706e45c2a839..e0cc3dac3bec 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -63,21 +63,24 @@ soft:
63/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ 63/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
64static int ksz9021rn_phy_fixup(struct phy_device *phydev) 64static int ksz9021rn_phy_fixup(struct phy_device *phydev)
65{ 65{
66 /* min rx data delay */ 66 if (IS_ENABLED(CONFIG_PHYLIB)) {
67 phy_write(phydev, 0x0b, 0x8105); 67 /* min rx data delay */
68 phy_write(phydev, 0x0c, 0x0000); 68 phy_write(phydev, 0x0b, 0x8105);
69 phy_write(phydev, 0x0c, 0x0000);
69 70
70 /* max rx/tx clock delay, min rx/tx control delay */ 71 /* max rx/tx clock delay, min rx/tx control delay */
71 phy_write(phydev, 0x0b, 0x8104); 72 phy_write(phydev, 0x0b, 0x8104);
72 phy_write(phydev, 0x0c, 0xf0f0); 73 phy_write(phydev, 0x0c, 0xf0f0);
73 phy_write(phydev, 0x0b, 0x104); 74 phy_write(phydev, 0x0b, 0x104);
75 }
74 76
75 return 0; 77 return 0;
76} 78}
77 79
78static void __init imx6q_sabrelite_init(void) 80static void __init imx6q_sabrelite_init(void)
79{ 81{
80 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, 82 if (IS_ENABLED(CONFIG_PHYLIB))
83 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
81 ksz9021rn_phy_fixup); 84 ksz9021rn_phy_fixup);
82} 85}
83 86