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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-06-14 11:56:52 -0400
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-06-30 02:59:58 -0400
commit9f72ffedc8409b9c9cbe17a9f66c2982baa4ff52 (patch)
treef996492cf0eebe5bb6f164776db25865c7ab8991 /arch/arm/mach-imx/include
parente780d2392dd37fcc231d97400c1cdd8d261ed556 (diff)
ARM: imx: new Kconfig symbol and feature test macro for DMA on mx1 and mx2
This should be used instead of hard coding the corresponding platforms. The feature test macro is needed to support different SOCs in a single kernel image. While at it rename dma-mx1-mx2 to dma-v1 as mx25 doesn't use it and so the mx2 part is wrong and move the header to arch/arm/mach-imx. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/include')
-rw-r--r--arch/arm/mach-imx/include/mach/dma-mx1-mx2.h10
-rw-r--r--arch/arm/mach-imx/include/mach/dma-v1.h107
2 files changed, 117 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
new file mode 100644
index 000000000000..df5f522da6b3
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
@@ -0,0 +1,10 @@
1#ifndef __MACH_DMA_MX1_MX2_H__
2#define __MACH_DMA_MX1_MX2_H__
3/*
4 * Don't use this header in new code, it will go away when all users are
5 * converted to mach/dma-v1.h
6 */
7
8#include <mach/dma-v1.h>
9
10#endif /* ifndef __MACH_DMA_MX1_MX2_H__ */
diff --git a/arch/arm/mach-imx/include/mach/dma-v1.h b/arch/arm/mach-imx/include/mach/dma-v1.h
new file mode 100644
index 000000000000..287431cc13e5
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/dma-v1.h
@@ -0,0 +1,107 @@
1/*
2 * linux/arch/arm/mach-imx/include/mach/dma-v1.h
3 *
4 * i.MX DMA registration and IRQ dispatching
5 *
6 * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
7 * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
8 * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301, USA.
23 */
24
25#ifndef __MACH_DMA_V1_H__
26#define __MACH_DMA_V1_H__
27
28#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
29
30#define IMX_DMA_CHANNELS 16
31
32#define DMA_MODE_READ 0
33#define DMA_MODE_WRITE 1
34#define DMA_MODE_MASK 1
35
36#define MX1_DMA_REG(offset) MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR + (offset))
37
38/* DMA Interrupt Mask Register */
39#define MX1_DMA_DIMR MX1_DMA_REG(0x08)
40
41/* Channel Control Register */
42#define MX1_DMA_CCR(x) MX1_DMA_REG(0x8c + ((x) << 6))
43
44#define IMX_DMA_MEMSIZE_32 (0 << 4)
45#define IMX_DMA_MEMSIZE_8 (1 << 4)
46#define IMX_DMA_MEMSIZE_16 (2 << 4)
47#define IMX_DMA_TYPE_LINEAR (0 << 10)
48#define IMX_DMA_TYPE_2D (1 << 10)
49#define IMX_DMA_TYPE_FIFO (2 << 10)
50
51#define IMX_DMA_ERR_BURST (1 << 0)
52#define IMX_DMA_ERR_REQUEST (1 << 1)
53#define IMX_DMA_ERR_TRANSFER (1 << 2)
54#define IMX_DMA_ERR_BUFFER (1 << 3)
55#define IMX_DMA_ERR_TIMEOUT (1 << 4)
56
57int
58imx_dma_config_channel(int channel, unsigned int config_port,
59 unsigned int config_mem, unsigned int dmareq, int hw_chaining);
60
61void
62imx_dma_config_burstlen(int channel, unsigned int burstlen);
63
64int
65imx_dma_setup_single(int channel, dma_addr_t dma_address,
66 unsigned int dma_length, unsigned int dev_addr,
67 unsigned int dmamode);
68
69
70/*
71 * Use this flag as the dma_length argument to imx_dma_setup_sg()
72 * to create an endless running dma loop. The end of the scatterlist
73 * must be linked to the beginning for this to work.
74 */
75#define IMX_DMA_LENGTH_LOOP ((unsigned int)-1)
76
77int
78imx_dma_setup_sg(int channel, struct scatterlist *sg,
79 unsigned int sgcount, unsigned int dma_length,
80 unsigned int dev_addr, unsigned int dmamode);
81
82int
83imx_dma_setup_handlers(int channel,
84 void (*irq_handler) (int, void *),
85 void (*err_handler) (int, void *, int), void *data);
86
87int
88imx_dma_setup_progression_handler(int channel,
89 void (*prog_handler) (int, void*, struct scatterlist*));
90
91void imx_dma_enable(int channel);
92
93void imx_dma_disable(int channel);
94
95int imx_dma_request(int channel, const char *name);
96
97void imx_dma_free(int channel);
98
99enum imx_dma_prio {
100 DMA_PRIO_HIGH = 0,
101 DMA_PRIO_MEDIUM = 1,
102 DMA_PRIO_LOW = 2
103};
104
105int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
106
107#endif /* __MACH_DMA_V1_H__ */