Merge branch 'next/devel' of git://git.linaro.org/people/arnd/arm-soc

* 'next/devel' of git://git.linaro.org/people/arnd/arm-soc: (50 commits)
  ARM: tegra: update defconfig
  arm/tegra: Harmony: Configure PMC for low-level interrupts
  arm/tegra: device tree support for ventana board
  arm/tegra: add support for ventana pinmuxing
  arm/tegra: prepare Seaboard pinmux code for derived boards
  arm/tegra: pinmux: ioremap registers
  gpio/tegra: Convert to a platform device
  arm/tegra: Convert pinmux driver to a platform device
  arm/dt: Tegra: Add pinmux node to tegra20.dtsi
  arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
  ARM: mx5: fix clock usage for suspend
  ARM i.MX entry-macro.S: remove now unused code
  ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER
  ARM i.MX tzic: add handle_irq function
  ARM i.MX avic: add handle_irq function
  ARM: mx25: Add the missing IIM base definition
  ARM i.MX avic: convert to use generic irq chip
  mx31moboard: Add poweroff support
  ARM: mach-qong: Add watchdog support
  ARM: davinci: AM18x: Add wl1271/wlan support
  ...

Fix up conflicts in:
	arch/arm/mach-at91/at91sam9g45.c
	arch/arm/mach-mx5/devices-imx53.h
	arch/arm/plat-mxc/include/mach/memory.h

1 files changed, 14 insertions, 16 deletions

diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
index 6637cd819ecb..846e46eb8cbf 100644
--- a/arch/arm/mach-imx/cpu-imx35.c
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -13,32 +13,30 @@
 #include <mach/hardware.h>
 #include <mach/iim.h>
 
-unsigned int mx35_cpu_rev;
-EXPORT_SYMBOL(mx35_cpu_rev);
+static int mx35_cpu_rev = -1;
 
-void __init mx35_read_cpu_rev(void)
+static int mx35_read_cpu_rev(void)
 {
         u32 rev;
-        char *srev;
 
         rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
         switch (rev) {
         case 0x00:
-                mx35_cpu_rev = IMX_CHIP_REVISION_1_0;
-                srev = "1.0";
-                break;
+                return IMX_CHIP_REVISION_1_0;
         case 0x10:
-                mx35_cpu_rev = IMX_CHIP_REVISION_2_0;
-                srev = "2.0";
-                break;
+                return IMX_CHIP_REVISION_2_0;
         case 0x11:
-                mx35_cpu_rev = IMX_CHIP_REVISION_2_1;
-                srev = "2.1";
-                break;
+                return IMX_CHIP_REVISION_2_1;
         default:
-                mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
-                srev = "unknown";
+                return IMX_CHIP_REVISION_UNKNOWN;
         }
+}
+
+int mx35_revision(void)
+{
+        if (mx35_cpu_rev == -1)
+                mx35_cpu_rev = mx35_read_cpu_rev();
 
-        printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
+        return mx35_cpu_rev;
 }
+EXPORT_SYMBOL(mx35_revision);