Merge branch 'next/devel' of git://git.linaro.org/people/arnd/arm-soc

* 'next/devel' of git://git.linaro.org/people/arnd/arm-soc: (50 commits)
  ARM: tegra: update defconfig
  arm/tegra: Harmony: Configure PMC for low-level interrupts
  arm/tegra: device tree support for ventana board
  arm/tegra: add support for ventana pinmuxing
  arm/tegra: prepare Seaboard pinmux code for derived boards
  arm/tegra: pinmux: ioremap registers
  gpio/tegra: Convert to a platform device
  arm/tegra: Convert pinmux driver to a platform device
  arm/dt: Tegra: Add pinmux node to tegra20.dtsi
  arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
  ARM: mx5: fix clock usage for suspend
  ARM i.MX entry-macro.S: remove now unused code
  ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER
  ARM i.MX tzic: add handle_irq function
  ARM i.MX avic: add handle_irq function
  ARM: mx25: Add the missing IIM base definition
  ARM i.MX avic: convert to use generic irq chip
  mx31moboard: Add poweroff support
  ARM: mach-qong: Add watchdog support
  ARM: davinci: AM18x: Add wl1271/wlan support
  ...

Fix up conflicts in:
	arch/arm/mach-at91/at91sam9g45.c
	arch/arm/mach-mx5/devices-imx53.h
	arch/arm/plat-mxc/include/mach/memory.h

1 files changed, 27 insertions, 22 deletions

diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index a3780700a882..3f2345f0cdaf 100644
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -13,45 +13,50 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <mach/iim.h>
+#include <mach/common.h>
 
-unsigned int mx31_cpu_rev;
-EXPORT_SYMBOL(mx31_cpu_rev);
+static int mx31_cpu_rev = -1;
 
 static struct {
         u8 srev;
         const char *name;
-        const char *v;
         unsigned int rev;
-} mx31_cpu_type[] __initdata = {
-        { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = IMX_CHIP_REVISION_1_0  },
-        { .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = IMX_CHIP_REVISION_1_1  },
-        { .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = IMX_CHIP_REVISION_1_1  },
-        { .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = IMX_CHIP_REVISION_1_1  },
-        { .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = IMX_CHIP_REVISION_1_1  },
-        { .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = IMX_CHIP_REVISION_1_2  },
-        { .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = IMX_CHIP_REVISION_1_2  },
-        { .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = IMX_CHIP_REVISION_2_0  },
-        { .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = IMX_CHIP_REVISION_2_0  },
+} mx31_cpu_type[] = {
+        { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
+        { .srev = 0x10, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_1 },
+        { .srev = 0x11, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_1 },
+        { .srev = 0x12, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_1 },
+        { .srev = 0x13, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_1 },
+        { .srev = 0x14, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_2 },
+        { .srev = 0x15, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_2 },
+        { .srev = 0x28, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_2_0 },
+        { .srev = 0x29, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_2_0 },
 };
 
-void __init mx31_read_cpu_rev(void)
+static int mx31_read_cpu_rev(void)
 {
         u32 i, srev;
 
         /* read SREV register from IIM module */
         srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
+        srev &= 0xff;
 
         for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
                 if (srev == mx31_cpu_type[i].srev) {
-                        printk(KERN_INFO
-                                "CPU identified as %s, silicon rev %s\n",
-                                mx31_cpu_type[i].name, mx31_cpu_type[i].v);
-
-                        mx31_cpu_rev = mx31_cpu_type[i].rev;
-                        return;
+                        imx_print_silicon_rev(mx31_cpu_type[i].name,
+                                                mx31_cpu_type[i].rev);
+                        return mx31_cpu_type[i].rev;
                 }
 
-        mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
+        imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
+        return IMX_CHIP_REVISION_UNKNOWN;
+}
+
+int mx31_revision(void)
+{
+        if (mx31_cpu_rev == -1)
+                mx31_cpu_rev = mx31_read_cpu_rev();
 
-        printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
+        return mx31_cpu_rev;
 }
+EXPORT_SYMBOL(mx31_revision);