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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-09 17:38:28 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-09 17:38:28 -0500 |
commit | 6cd94d5e57ab97ddd672b707ab4bb639672c1727 (patch) | |
tree | b1b301b16433d4deab6bd52e81d04a7b58c239d3 /arch/arm/mach-imx/common.h | |
parent | 6c9e92476bc924ede6d6d2f0bfed2c06ae148d29 (diff) | |
parent | 842f7d2c4d392c0571cf72e3eaca26742bebbd1e (diff) |
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Arnd Bergmann:
"New and updated SoC support, notable changes include:
- bcm:
brcmstb SMP support
initial iproc/cygnus support
- exynos:
Exynos4415 SoC support
PMU and suspend support for Exynos5420
PMU support for Exynos3250
pm related maintenance
- imx:
new LS1021A SoC support
vybrid 610 global timer support
- integrator:
convert to using multiplatform configuration
- mediatek:
earlyprintk support for mt8127/mt8135
- meson:
meson8 soc and l2 cache controller support
- mvebu:
Armada 38x CPU hotplug support
drop support for prerelease Armada 375 Z1 stepping
extended suspend support, now works on Armada 370/XP
- omap:
hwmod related maintenance
prcm cleanup
- pxa:
initial pxa27x DT handling
- rockchip:
SMP support for rk3288
add cpu frequency scaling support
- shmobile:
r8a7740 power domain support
various small restart, timer, pci apmu changes
- sunxi:
Allwinner A80 (sun9i) earlyprintk support
- ux500:
power domain support
Overall, a significant chunk of changes, coming mostly from the usual
suspects: omap, shmobile, samsung and mvebu, all of which already
contain a lot of platform specific code in arch/arm"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
soc: integrator: Add terminating entry for integrator_cm_match
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
ARM: add lolevel debug support for asm9260
ARM: add mach-asm9260
ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
...
Diffstat (limited to 'arch/arm/mach-imx/common.h')
-rw-r--r-- | arch/arm/mach-imx/common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 3d383cb5e6d1..cfcdb623d78f 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h | |||
@@ -115,6 +115,7 @@ void imx_anatop_post_resume(void); | |||
115 | int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); | 115 | int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); |
116 | void imx6q_set_int_mem_clk_lpm(bool enable); | 116 | void imx6q_set_int_mem_clk_lpm(bool enable); |
117 | void imx6sl_set_wait_clk(bool enter); | 117 | void imx6sl_set_wait_clk(bool enter); |
118 | int imx_mmdc_get_ddr_type(void); | ||
118 | 119 | ||
119 | void imx_cpu_die(unsigned int cpu); | 120 | void imx_cpu_die(unsigned int cpu); |
120 | int imx_cpu_kill(unsigned int cpu); | 121 | int imx_cpu_kill(unsigned int cpu); |
@@ -156,5 +157,6 @@ static inline void imx_init_l2cache(void) {} | |||
156 | #endif | 157 | #endif |
157 | 158 | ||
158 | extern struct smp_operations imx_smp_ops; | 159 | extern struct smp_operations imx_smp_ops; |
160 | extern struct smp_operations ls1021a_smp_ops; | ||
159 | 161 | ||
160 | #endif | 162 | #endif |