diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-09-11 02:40:38 -0400 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-09-12 05:46:45 -0400 |
commit | a6dd3c812e774b876d440c1a9ec1bd0fd5659390 (patch) | |
tree | 1f72b83956cafac59a3d7e453ff546c61aa88337 /arch/arm/mach-imx/clk-pllv1.c | |
parent | 8b23f5132d319c790e5f56df6f3df3a84071ae6e (diff) |
ARM: i.MX clk pllv1: move mxc_decode_pll code to its user
The only code using mxc_decode_pll is clk-pllv1.c, so move the code
there.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/clk-pllv1.c')
-rw-r--r-- | arch/arm/mach-imx/clk-pllv1.c | 47 |
1 files changed, 46 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 2d856f9ccf59..4a03c9360934 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c | |||
@@ -29,8 +29,53 @@ static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw, | |||
29 | unsigned long parent_rate) | 29 | unsigned long parent_rate) |
30 | { | 30 | { |
31 | struct clk_pllv1 *pll = to_clk_pllv1(hw); | 31 | struct clk_pllv1 *pll = to_clk_pllv1(hw); |
32 | long long ll; | ||
33 | int mfn_abs; | ||
34 | unsigned int mfi, mfn, mfd, pd; | ||
35 | u32 reg; | ||
36 | unsigned long rate; | ||
32 | 37 | ||
33 | return mxc_decode_pll(readl(pll->base), parent_rate); | 38 | reg = readl(pll->base); |
39 | |||
40 | /* | ||
41 | * Get the resulting clock rate from a PLL register value and the input | ||
42 | * frequency. PLLs with this register layout can be found on i.MX1, | ||
43 | * i.MX21, i.MX27 and i,MX31 | ||
44 | * | ||
45 | * mfi + mfn / (mfd + 1) | ||
46 | * f = 2 * f_ref * -------------------- | ||
47 | * pd + 1 | ||
48 | */ | ||
49 | |||
50 | mfi = (reg >> 10) & 0xf; | ||
51 | mfn = reg & 0x3ff; | ||
52 | mfd = (reg >> 16) & 0x3ff; | ||
53 | pd = (reg >> 26) & 0xf; | ||
54 | |||
55 | mfi = mfi <= 5 ? 5 : mfi; | ||
56 | |||
57 | mfn_abs = mfn; | ||
58 | |||
59 | /* | ||
60 | * On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit | ||
61 | * 2's complements number | ||
62 | */ | ||
63 | if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) | ||
64 | mfn_abs = 0x400 - mfn; | ||
65 | |||
66 | rate = parent_rate * 2; | ||
67 | rate /= pd + 1; | ||
68 | |||
69 | ll = (unsigned long long)rate * mfn_abs; | ||
70 | |||
71 | do_div(ll, mfd + 1); | ||
72 | |||
73 | if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) | ||
74 | ll = -ll; | ||
75 | |||
76 | ll = (rate * mfi) + ll; | ||
77 | |||
78 | return ll; | ||
34 | } | 79 | } |
35 | 80 | ||
36 | struct clk_ops clk_pllv1_ops = { | 81 | struct clk_ops clk_pllv1_ops = { |