Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc device tree description updates from Arnd Bergmann:
 "This branch contains two kinds of updates: Some platforms in the
  process of getting converted to device tree based booting, and the
  platform specific patches necessary for that are included here.

  Other platforms are already converted, so we just need to update the
  actual device tree source files and the binding documents to add
  support for new board and new drivers.

  In the future we will probably separate those into two branches, and
  in the long run, the plan is to move the device tree source files out
  of the kernel repository, but that has to wait until we have completed
  a much larger portion of the binding documents."

Fix up trivial conflicts in arch/arm/mach-imx/clk-imx6q.c due to newly
added clkdev registers next to a few removed unnecessary ones.

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
  ARM: LPC32xx: Add PWM to base dts file
  ARM: EXYNOS: mark the DMA channel binding for SPI as preliminary
  ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS5 platforms
  ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOS5
  ARM: EXYNOS: Add spi clock support for EXYNOS5
  ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS4 platforms
  ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOX4
  ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clock
  ARM: ux500: Remove PMU platform registration when booting with DT
  ARM: ux500: Remove temporary snowball_of_platform_devs enablement structure
  ARM: ux500: Ensure vendor specific properties have the vendor's identifier
  pinctrl: pinctrl-nomadik: Append sleepmode property with vendor specific prefixes
  ARM: ux500: Move rtc-pl031 registration to Device Tree when enabled
  ARM: ux500: Enable the AB8500 RTC for all DT:ed DB8500 based devices
  ARM: ux500: Correctly reference IRQs supplied by the AB8500 from Device Tree
  ARM: ux500: Apply ab8500-debug node do the db8500 DT structure
  ARM: ux500: Add a ab8500-usb Device Tree node for db8500 based devices
  ARM: ux500: Add db8500 Device Tree node for misc/ab8500-pwm
  ARM: ux500: Add db8500 Device Tree node for ab8500-sysctrl
  ARM: ux500: Enable LED heartbeat functionality on Snowbal via DT
  ...

1 files changed, 19 insertions, 3 deletions

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index abb42e7453a9..ea89520b6e22 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -147,12 +147,12 @@ enum mx6q_clks {
         esai, gpt_ipg, gpt_ipg_per, gpu2d_core, gpu3d_core, hdmi_iahb,
         hdmi_isfr, i2c1, i2c2, i2c3, iim, enfc, ipu1, ipu1_di0, ipu1_di1, ipu2,
         ipu2_di0, ldb_di0, ldb_di1, ipu2_di1, hsi_tx, mlb, mmdc_ch0_axi,
-        mmdc_ch1_axi, ocram, openvg_axi, pcie_axi, pwm1, pwm2, pwm3, pwm4,
+        mmdc_ch1_axi, ocram, openvg_axi, pcie_axi, pwm1, pwm2, pwm3, pwm4, per1_bch,
         gpmi_bch_apb, gpmi_bch, gpmi_io, gpmi_apb, sata, sdma, spba, ssi1,
         ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
         usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
         pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
-        ssi2_ipg, ssi3_ipg, rom,
+        ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2,
         clk_max
 };
 
@@ -198,6 +198,9 @@ int __init mx6q_clocks_init(void)
         clk[pll7_usb_host] = imx_clk_pllv3(IMX_PLLV3_USB,       "pll7_usb_host","osc", base + 0x20, 0x2000,   0x3);
         clk[pll8_enet]     = imx_clk_pllv3(IMX_PLLV3_ENET,      "pll8_enet",    "osc", base + 0xe0, 0x182000, 0x3);
 
+        clk[usbphy1] = imx_clk_gate("usbphy1", "pll3_usb_otg", base + 0x10, 6);
+        clk[usbphy2] = imx_clk_gate("usbphy2", "pll7_usb_host", base + 0x20, 6);
+
         /*                                name              parent_name        reg       idx */
         clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus",     base + 0x100, 0);
         clk[pll2_pfd1_594m] = imx_clk_pfd("pll2_pfd1_594m", "pll2_bus",     base + 0x100, 1);
@@ -318,7 +321,7 @@ int __init mx6q_clocks_init(void)
         clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);
 
         /*                                name             parent_name          reg         shift */
-        clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);
+        clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);
         clk[asrc]         = imx_clk_gate2("asrc",          "asrc_podf",         base + 0x68, 6);
         clk[can1_ipg]     = imx_clk_gate2("can1_ipg",      "ipg",               base + 0x68, 14);
         clk[can1_serial]  = imx_clk_gate2("can1_serial",   "can_root",          base + 0x68, 16);
@@ -357,6 +360,7 @@ int __init mx6q_clocks_init(void)
         clk[ocram]        = imx_clk_gate2("ocram",         "ahb",               base + 0x74, 28);
         clk[openvg_axi]   = imx_clk_gate2("openvg_axi",    "axi",               base + 0x74, 30);
         clk[pcie_axi]     = imx_clk_gate2("pcie_axi",      "pcie_axi_sel",      base + 0x78, 0);
+        clk[per1_bch]     = imx_clk_gate2("per1_bch",      "usdhc3",            base + 0x78, 12);
         clk[pwm1]         = imx_clk_gate2("pwm1",          "ipg_per",           base + 0x78, 16);
         clk[pwm2]         = imx_clk_gate2("pwm2",          "ipg_per",           base + 0x78, 18);
         clk[pwm3]         = imx_clk_gate2("pwm3",          "ipg_per",           base + 0x78, 20);
@@ -391,6 +395,18 @@ int __init mx6q_clocks_init(void)
         clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");
         clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
         clk_register_clkdev(clk[twd], NULL, "smp_twd");
+        clk_register_clkdev(clk[apbh_dma], NULL, "110000.dma-apbh");
+        clk_register_clkdev(clk[per1_bch], "per1_bch", "112000.gpmi-nand");
+        clk_register_clkdev(clk[gpmi_bch_apb], "gpmi_bch_apb", "112000.gpmi-nand");
+        clk_register_clkdev(clk[gpmi_bch], "gpmi_bch", "112000.gpmi-nand");
+        clk_register_clkdev(clk[gpmi_apb], "gpmi_apb", "112000.gpmi-nand");
+        clk_register_clkdev(clk[gpmi_io], "gpmi_io", "112000.gpmi-nand");
+        clk_register_clkdev(clk[usboh3], NULL, "2184000.usb");
+        clk_register_clkdev(clk[usboh3], NULL, "2184200.usb");
+        clk_register_clkdev(clk[usboh3], NULL, "2184400.usb");
+        clk_register_clkdev(clk[usboh3], NULL, "2184600.usb");
+        clk_register_clkdev(clk[usbphy1], NULL, "20c9000.usbphy");
+        clk_register_clkdev(clk[usbphy2], NULL, "20ca000.usbphy");
         clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
         clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
         clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");