diff options
author | Shawn Guo <shawn.guo@freescale.com> | 2014-05-19 22:23:50 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@freescale.com> | 2014-07-18 04:10:07 -0400 |
commit | e7d5eb3c4527e6b8c0d950d26037af2fa5ac7537 (patch) | |
tree | e16c400f30600263e63727272001b531f58264e4 /arch/arm/mach-imx/clk-imx51-imx53.c | |
parent | ee18a7154ee080af82cb81e93f1fdcbd44176d5e (diff) |
ARM: imx5: remove header crm-regs-imx5.h
Most of the macros in crm-regs-imx5.h are used nowhere. Let's move the
needed ones into the C files, and remove the header.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx51-imx53.c')
-rw-r--r-- | arch/arm/mach-imx/clk-imx51-imx53.c | 45 |
1 files changed, 44 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index 972b24c754b0..c8c88df7384d 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c | |||
@@ -18,11 +18,54 @@ | |||
18 | #include <linux/of_irq.h> | 18 | #include <linux/of_irq.h> |
19 | #include <dt-bindings/clock/imx5-clock.h> | 19 | #include <dt-bindings/clock/imx5-clock.h> |
20 | 20 | ||
21 | #include "crm-regs-imx5.h" | ||
22 | #include "clk.h" | 21 | #include "clk.h" |
23 | #include "common.h" | 22 | #include "common.h" |
24 | #include "hardware.h" | 23 | #include "hardware.h" |
25 | 24 | ||
25 | #define MX51_CCM_BASE MX51_IO_ADDRESS(MX51_CCM_BASE_ADDR) | ||
26 | #define MX51_DPLL1_BASE MX51_IO_ADDRESS(MX51_PLL1_BASE_ADDR) | ||
27 | #define MX51_DPLL2_BASE MX51_IO_ADDRESS(MX51_PLL2_BASE_ADDR) | ||
28 | #define MX51_DPLL3_BASE MX51_IO_ADDRESS(MX51_PLL3_BASE_ADDR) | ||
29 | #define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR) | ||
30 | #define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR) | ||
31 | #define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) | ||
32 | #define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR) | ||
33 | |||
34 | #define MXC_CCM_CCR (MX51_CCM_BASE + 0x00) | ||
35 | #define MXC_CCM_CCDR (MX51_CCM_BASE + 0x04) | ||
36 | #define MXC_CCM_CSR (MX51_CCM_BASE + 0x08) | ||
37 | #define MXC_CCM_CCSR (MX51_CCM_BASE + 0x0c) | ||
38 | #define MXC_CCM_CACRR (MX51_CCM_BASE + 0x10) | ||
39 | #define MXC_CCM_CBCDR (MX51_CCM_BASE + 0x14) | ||
40 | #define MXC_CCM_CBCMR (MX51_CCM_BASE + 0x18) | ||
41 | #define MXC_CCM_CSCMR1 (MX51_CCM_BASE + 0x1c) | ||
42 | #define MXC_CCM_CSCMR2 (MX51_CCM_BASE + 0x20) | ||
43 | #define MXC_CCM_CSCDR1 (MX51_CCM_BASE + 0x24) | ||
44 | #define MXC_CCM_CS1CDR (MX51_CCM_BASE + 0x28) | ||
45 | #define MXC_CCM_CS2CDR (MX51_CCM_BASE + 0x2c) | ||
46 | #define MXC_CCM_CDCDR (MX51_CCM_BASE + 0x30) | ||
47 | #define MXC_CCM_CHSCDR (MX51_CCM_BASE + 0x34) | ||
48 | #define MXC_CCM_CSCDR2 (MX51_CCM_BASE + 0x38) | ||
49 | #define MXC_CCM_CSCDR3 (MX51_CCM_BASE + 0x3c) | ||
50 | #define MXC_CCM_CSCDR4 (MX51_CCM_BASE + 0x40) | ||
51 | #define MXC_CCM_CWDR (MX51_CCM_BASE + 0x44) | ||
52 | #define MXC_CCM_CDHIPR (MX51_CCM_BASE + 0x48) | ||
53 | #define MXC_CCM_CDCR (MX51_CCM_BASE + 0x4c) | ||
54 | #define MXC_CCM_CTOR (MX51_CCM_BASE + 0x50) | ||
55 | #define MXC_CCM_CLPCR (MX51_CCM_BASE + 0x54) | ||
56 | #define MXC_CCM_CISR (MX51_CCM_BASE + 0x58) | ||
57 | #define MXC_CCM_CIMR (MX51_CCM_BASE + 0x5c) | ||
58 | #define MXC_CCM_CCOSR (MX51_CCM_BASE + 0x60) | ||
59 | #define MXC_CCM_CGPR (MX51_CCM_BASE + 0x64) | ||
60 | #define MXC_CCM_CCGR0 (MX51_CCM_BASE + 0x68) | ||
61 | #define MXC_CCM_CCGR1 (MX51_CCM_BASE + 0x6c) | ||
62 | #define MXC_CCM_CCGR2 (MX51_CCM_BASE + 0x70) | ||
63 | #define MXC_CCM_CCGR3 (MX51_CCM_BASE + 0x74) | ||
64 | #define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78) | ||
65 | #define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7c) | ||
66 | #define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80) | ||
67 | #define MXC_CCM_CCGR7 (MX51_CCM_BASE + 0x84) | ||
68 | |||
26 | /* Low-power Audio Playback Mode clock */ | 69 | /* Low-power Audio Playback Mode clock */ |
27 | static const char *lp_apm_sel[] = { "osc", }; | 70 | static const char *lp_apm_sel[] = { "osc", }; |
28 | 71 | ||