diff options
author | Alexander Shiyan <shc_work@mail.ru> | 2014-06-10 11:40:26 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@freescale.com> | 2014-07-18 04:10:12 -0400 |
commit | 229be9c14176989b0cb68d4d8aeba30486ec8e16 (patch) | |
tree | 4f7988a238a29854714e568afaf6310c36764db5 /arch/arm/mach-imx/clk-imx35.c | |
parent | c349adde00e8aba6c05316ef8670836baff2d503 (diff) |
ARM: i.MX clk: Move clock check function in common location
This patch moves clock check function in common i.MX location
and switch i.MX clk drivers to use this new function.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx35.c')
-rw-r--r-- | arch/arm/mach-imx/clk-imx35.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index 71c86a2f856d..a0d2b57fd376 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c | |||
@@ -75,7 +75,6 @@ int __init mx35_clocks_init(void) | |||
75 | u32 pdr0, consumer_sel, hsp_sel; | 75 | u32 pdr0, consumer_sel, hsp_sel; |
76 | struct arm_ahb_div *aad; | 76 | struct arm_ahb_div *aad; |
77 | unsigned char *hsp_div; | 77 | unsigned char *hsp_div; |
78 | u32 i; | ||
79 | 78 | ||
80 | pdr0 = __raw_readl(base + MXC_CCM_PDR0); | 79 | pdr0 = __raw_readl(base + MXC_CCM_PDR0); |
81 | consumer_sel = (pdr0 >> 16) & 0xf; | 80 | consumer_sel = (pdr0 >> 16) & 0xf; |
@@ -200,10 +199,7 @@ int __init mx35_clocks_init(void) | |||
200 | clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3, 2); | 199 | clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3, 2); |
201 | clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3, 4); | 200 | clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3, 4); |
202 | 201 | ||
203 | for (i = 0; i < ARRAY_SIZE(clk); i++) | 202 | imx_check_clocks(clk, ARRAY_SIZE(clk)); |
204 | if (IS_ERR(clk[i])) | ||
205 | pr_err("i.MX35 clk %d: register failed with %ld\n", | ||
206 | i, PTR_ERR(clk[i])); | ||
207 | 203 | ||
208 | clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); | 204 | clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); |
209 | clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); | 205 | clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); |