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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-11-29 05:50:22 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-11-29 05:50:22 -0500
commitb9c78022b0e65cdca2541be658f0e74138e92ffe (patch)
treee23644c81ea8218b6852645a392e68f98c9775b9 /arch/arm/mach-h720x
parent5bed1fb3287dfb1f6cf717ec200b23d3e537c9ae (diff)
[ARM] move MAX_DMA_ADDRESS to mach/memory.h
Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h, thereby placing it along side its relative, ISA_DMA_THRESHOLD. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-h720x')
-rw-r--r--arch/arm/mach-h720x/include/mach/dma.h7
-rw-r--r--arch/arm/mach-h720x/include/mach/memory.h9
2 files changed, 9 insertions, 7 deletions
diff --git a/arch/arm/mach-h720x/include/mach/dma.h b/arch/arm/mach-h720x/include/mach/dma.h
index 0a9d86ee84fe..2d7c77a9792a 100644
--- a/arch/arm/mach-h720x/include/mach/dma.h
+++ b/arch/arm/mach-h720x/include/mach/dma.h
@@ -8,13 +8,6 @@
8#ifndef __ASM_ARCH_DMA_H 8#ifndef __ASM_ARCH_DMA_H
9#define __ASM_ARCH_DMA_H 9#define __ASM_ARCH_DMA_H
10 10
11/*
12 * This is the maximum DMA address that can be DMAd to.
13 * There should not be more than (0xd0000000 - 0xc0000000)
14 * bytes of RAM.
15 */
16#define MAX_DMA_ADDRESS 0xd0000000
17
18#if defined (CONFIG_CPU_H7201) 11#if defined (CONFIG_CPU_H7201)
19#define MAX_DMA_CHANNELS 3 12#define MAX_DMA_CHANNELS 3
20#elif defined (CONFIG_CPU_H7202) 13#elif defined (CONFIG_CPU_H7202)
diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h
index 83a2fa090e88..8cfb665e04b1 100644
--- a/arch/arm/mach-h720x/include/mach/memory.h
+++ b/arch/arm/mach-h720x/include/mach/memory.h
@@ -8,5 +8,14 @@
8#define __ASM_ARCH_MEMORY_H 8#define __ASM_ARCH_MEMORY_H
9 9
10#define PHYS_OFFSET UL(0x40000000) 10#define PHYS_OFFSET UL(0x40000000)
11/*
12 * This is the maximum DMA address that can be DMAd to.
13 * There should not be more than (0xd0000000 - 0xc0000000)
14 * bytes of RAM.
15 *
16 * If you set this, you must also set ISA_DMA_THRESHOLD and setup a DMA
17 * zone if this does not cover all possible RAM.
18 */
19#define MAX_DMA_ADDRESS 0xd0000000
11 20
12#endif 21#endif