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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-11-23 06:41:32 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-11-30 07:24:47 -0500
commit10dd5ce28d78e2440e8fa1135d17e33399d75340 (patch)
treed2e76765a57e7e47a9c424f99c3a22bf99c6da64 /arch/arm/mach-h720x
parent127e477e0cd8da4d3058709ab2dc7b92dccbcba5 (diff)
[ARM] Remove compatibility layer for ARM irqs
set_irq_chipdata -> set_irq_chip_data get_irq_chipdata -> get_irq_chip_data do_level_IRQ -> handle_level_irq do_edge_IRQ -> handle_edge_irq do_simple_IRQ -> handle_simple_irq irqdesc -> irq_desc irqchip -> irq_chip Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-h720x')
-rw-r--r--arch/arm/mach-h720x/common.c22
-rw-r--r--arch/arm/mach-h720x/cpu-h7202.c6
2 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 4719229a1a78..7f31816896ad 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -101,7 +101,7 @@ static void inline unmask_gpio_irq(u32 irq)
101 101
102static void 102static void
103h720x_gpio_handler(unsigned int mask, unsigned int irq, 103h720x_gpio_handler(unsigned int mask, unsigned int irq,
104 struct irqdesc *desc) 104 struct irq_desc *desc)
105{ 105{
106 IRQDBG("%s irq: %d\n",__FUNCTION__,irq); 106 IRQDBG("%s irq: %d\n",__FUNCTION__,irq);
107 desc = irq_desc + irq; 107 desc = irq_desc + irq;
@@ -117,7 +117,7 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq,
117} 117}
118 118
119static void 119static void
120h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc) 120h720x_gpioa_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
121{ 121{
122 unsigned int mask, irq; 122 unsigned int mask, irq;
123 123
@@ -128,7 +128,7 @@ h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
128} 128}
129 129
130static void 130static void
131h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc) 131h720x_gpiob_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
132{ 132{
133 unsigned int mask, irq; 133 unsigned int mask, irq;
134 mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT); 134 mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT);
@@ -138,7 +138,7 @@ h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
138} 138}
139 139
140static void 140static void
141h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc) 141h720x_gpioc_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
142{ 142{
143 unsigned int mask, irq; 143 unsigned int mask, irq;
144 144
@@ -149,7 +149,7 @@ h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
149} 149}
150 150
151static void 151static void
152h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc) 152h720x_gpiod_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
153{ 153{
154 unsigned int mask, irq; 154 unsigned int mask, irq;
155 155
@@ -161,7 +161,7 @@ h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
161 161
162#ifdef CONFIG_CPU_H7202 162#ifdef CONFIG_CPU_H7202
163static void 163static void
164h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc) 164h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
165{ 165{
166 unsigned int mask, irq; 166 unsigned int mask, irq;
167 167
@@ -172,13 +172,13 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
172} 172}
173#endif 173#endif
174 174
175static struct irqchip h720x_global_chip = { 175static struct irq_chip h720x_global_chip = {
176 .ack = mask_global_irq, 176 .ack = mask_global_irq,
177 .mask = mask_global_irq, 177 .mask = mask_global_irq,
178 .unmask = unmask_global_irq, 178 .unmask = unmask_global_irq,
179}; 179};
180 180
181static struct irqchip h720x_gpio_chip = { 181static struct irq_chip h720x_gpio_chip = {
182 .ack = ack_gpio_irq, 182 .ack = ack_gpio_irq,
183 .mask = mask_gpio_irq, 183 .mask = mask_gpio_irq,
184 .unmask = unmask_gpio_irq, 184 .unmask = unmask_gpio_irq,
@@ -203,14 +203,14 @@ void __init h720x_init_irq (void)
203 /* Initialize global IRQ's, fast path */ 203 /* Initialize global IRQ's, fast path */
204 for (irq = 0; irq < NR_GLBL_IRQS; irq++) { 204 for (irq = 0; irq < NR_GLBL_IRQS; irq++) {
205 set_irq_chip(irq, &h720x_global_chip); 205 set_irq_chip(irq, &h720x_global_chip);
206 set_irq_handler(irq, do_level_IRQ); 206 set_irq_handler(irq, handle_level_irq);
207 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 207 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
208 } 208 }
209 209
210 /* Initialize multiplexed IRQ's, slow path */ 210 /* Initialize multiplexed IRQ's, slow path */
211 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { 211 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) {
212 set_irq_chip(irq, &h720x_gpio_chip); 212 set_irq_chip(irq, &h720x_gpio_chip);
213 set_irq_handler(irq, do_edge_IRQ); 213 set_irq_handler(irq, handle_edge_irq);
214 set_irq_flags(irq, IRQF_VALID ); 214 set_irq_flags(irq, IRQF_VALID );
215 } 215 }
216 set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); 216 set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
@@ -221,7 +221,7 @@ void __init h720x_init_irq (void)
221#ifdef CONFIG_CPU_H7202 221#ifdef CONFIG_CPU_H7202
222 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { 222 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) {
223 set_irq_chip(irq, &h720x_gpio_chip); 223 set_irq_chip(irq, &h720x_gpio_chip);
224 set_irq_handler(irq, do_edge_IRQ); 224 set_irq_handler(irq, handle_edge_irq);
225 set_irq_flags(irq, IRQF_VALID ); 225 set_irq_flags(irq, IRQF_VALID );
226 } 226 }
227 set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); 227 set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index 06fecaefd8dc..703870f30adf 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -106,7 +106,7 @@ static struct platform_device *devices[] __initdata = {
106 * we have to handle all timer interrupts in one place. 106 * we have to handle all timer interrupts in one place.
107 */ 107 */
108static void 108static void
109h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc) 109h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
110{ 110{
111 unsigned int mask, irq; 111 unsigned int mask, irq;
112 112
@@ -162,7 +162,7 @@ static void inline unmask_timerx_irq (u32 irq)
162 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit; 162 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit;
163} 163}
164 164
165static struct irqchip h7202_timerx_chip = { 165static struct irq_chip h7202_timerx_chip = {
166 .ack = mask_timerx_irq, 166 .ack = mask_timerx_irq,
167 .mask = mask_timerx_irq, 167 .mask = mask_timerx_irq,
168 .unmask = unmask_timerx_irq, 168 .unmask = unmask_timerx_irq,
@@ -202,7 +202,7 @@ void __init h7202_init_irq (void)
202 irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { 202 irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
203 mask_timerx_irq(irq); 203 mask_timerx_irq(irq);
204 set_irq_chip(irq, &h7202_timerx_chip); 204 set_irq_chip(irq, &h7202_timerx_chip);
205 set_irq_handler(irq, do_edge_IRQ); 205 set_irq_handler(irq, handle_edge_irq);
206 set_irq_flags(irq, IRQF_VALID ); 206 set_irq_flags(irq, IRQF_VALID );
207 } 207 }
208 set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); 208 set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);