diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-11-23 06:41:32 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 07:24:47 -0500 |
commit | 10dd5ce28d78e2440e8fa1135d17e33399d75340 (patch) | |
tree | d2e76765a57e7e47a9c424f99c3a22bf99c6da64 /arch/arm/mach-h720x/common.c | |
parent | 127e477e0cd8da4d3058709ab2dc7b92dccbcba5 (diff) |
[ARM] Remove compatibility layer for ARM irqs
set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-h720x/common.c')
-rw-r--r-- | arch/arm/mach-h720x/common.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index 4719229a1a78..7f31816896ad 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c | |||
@@ -101,7 +101,7 @@ static void inline unmask_gpio_irq(u32 irq) | |||
101 | 101 | ||
102 | static void | 102 | static void |
103 | h720x_gpio_handler(unsigned int mask, unsigned int irq, | 103 | h720x_gpio_handler(unsigned int mask, unsigned int irq, |
104 | struct irqdesc *desc) | 104 | struct irq_desc *desc) |
105 | { | 105 | { |
106 | IRQDBG("%s irq: %d\n",__FUNCTION__,irq); | 106 | IRQDBG("%s irq: %d\n",__FUNCTION__,irq); |
107 | desc = irq_desc + irq; | 107 | desc = irq_desc + irq; |
@@ -117,7 +117,7 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq, | |||
117 | } | 117 | } |
118 | 118 | ||
119 | static void | 119 | static void |
120 | h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | 120 | h720x_gpioa_demux_handler(unsigned int irq_unused, struct irq_desc *desc) |
121 | { | 121 | { |
122 | unsigned int mask, irq; | 122 | unsigned int mask, irq; |
123 | 123 | ||
@@ -128,7 +128,7 @@ h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | |||
128 | } | 128 | } |
129 | 129 | ||
130 | static void | 130 | static void |
131 | h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | 131 | h720x_gpiob_demux_handler(unsigned int irq_unused, struct irq_desc *desc) |
132 | { | 132 | { |
133 | unsigned int mask, irq; | 133 | unsigned int mask, irq; |
134 | mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT); | 134 | mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT); |
@@ -138,7 +138,7 @@ h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | |||
138 | } | 138 | } |
139 | 139 | ||
140 | static void | 140 | static void |
141 | h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | 141 | h720x_gpioc_demux_handler(unsigned int irq_unused, struct irq_desc *desc) |
142 | { | 142 | { |
143 | unsigned int mask, irq; | 143 | unsigned int mask, irq; |
144 | 144 | ||
@@ -149,7 +149,7 @@ h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | |||
149 | } | 149 | } |
150 | 150 | ||
151 | static void | 151 | static void |
152 | h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | 152 | h720x_gpiod_demux_handler(unsigned int irq_unused, struct irq_desc *desc) |
153 | { | 153 | { |
154 | unsigned int mask, irq; | 154 | unsigned int mask, irq; |
155 | 155 | ||
@@ -161,7 +161,7 @@ h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | |||
161 | 161 | ||
162 | #ifdef CONFIG_CPU_H7202 | 162 | #ifdef CONFIG_CPU_H7202 |
163 | static void | 163 | static void |
164 | h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | 164 | h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc) |
165 | { | 165 | { |
166 | unsigned int mask, irq; | 166 | unsigned int mask, irq; |
167 | 167 | ||
@@ -172,13 +172,13 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc) | |||
172 | } | 172 | } |
173 | #endif | 173 | #endif |
174 | 174 | ||
175 | static struct irqchip h720x_global_chip = { | 175 | static struct irq_chip h720x_global_chip = { |
176 | .ack = mask_global_irq, | 176 | .ack = mask_global_irq, |
177 | .mask = mask_global_irq, | 177 | .mask = mask_global_irq, |
178 | .unmask = unmask_global_irq, | 178 | .unmask = unmask_global_irq, |
179 | }; | 179 | }; |
180 | 180 | ||
181 | static struct irqchip h720x_gpio_chip = { | 181 | static struct irq_chip h720x_gpio_chip = { |
182 | .ack = ack_gpio_irq, | 182 | .ack = ack_gpio_irq, |
183 | .mask = mask_gpio_irq, | 183 | .mask = mask_gpio_irq, |
184 | .unmask = unmask_gpio_irq, | 184 | .unmask = unmask_gpio_irq, |
@@ -203,14 +203,14 @@ void __init h720x_init_irq (void) | |||
203 | /* Initialize global IRQ's, fast path */ | 203 | /* Initialize global IRQ's, fast path */ |
204 | for (irq = 0; irq < NR_GLBL_IRQS; irq++) { | 204 | for (irq = 0; irq < NR_GLBL_IRQS; irq++) { |
205 | set_irq_chip(irq, &h720x_global_chip); | 205 | set_irq_chip(irq, &h720x_global_chip); |
206 | set_irq_handler(irq, do_level_IRQ); | 206 | set_irq_handler(irq, handle_level_irq); |
207 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 207 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
208 | } | 208 | } |
209 | 209 | ||
210 | /* Initialize multiplexed IRQ's, slow path */ | 210 | /* Initialize multiplexed IRQ's, slow path */ |
211 | for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { | 211 | for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { |
212 | set_irq_chip(irq, &h720x_gpio_chip); | 212 | set_irq_chip(irq, &h720x_gpio_chip); |
213 | set_irq_handler(irq, do_edge_IRQ); | 213 | set_irq_handler(irq, handle_edge_irq); |
214 | set_irq_flags(irq, IRQF_VALID ); | 214 | set_irq_flags(irq, IRQF_VALID ); |
215 | } | 215 | } |
216 | set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); | 216 | set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); |
@@ -221,7 +221,7 @@ void __init h720x_init_irq (void) | |||
221 | #ifdef CONFIG_CPU_H7202 | 221 | #ifdef CONFIG_CPU_H7202 |
222 | for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { | 222 | for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { |
223 | set_irq_chip(irq, &h720x_gpio_chip); | 223 | set_irq_chip(irq, &h720x_gpio_chip); |
224 | set_irq_handler(irq, do_edge_IRQ); | 224 | set_irq_handler(irq, handle_edge_irq); |
225 | set_irq_flags(irq, IRQF_VALID ); | 225 | set_irq_flags(irq, IRQF_VALID ); |
226 | } | 226 | } |
227 | set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); | 227 | set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); |