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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 08:35:09 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:47:58 -0400
commitf38c02f3b338651e145aac2889ba976baf6b28b3 (patch)
tree30cfbf42ccff4a9dc26d95e9058ec76f5fde78bb /arch/arm/mach-h720x/common.c
parent9323f26186403433293e87e717a7785f74f75d80 (diff)
arm: Fold irq_set_chip/irq_set_handler
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-h720x/common.c')
-rw-r--r--arch/arm/mach-h720x/common.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index f118182a99ca..51d4e44ab973 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -199,15 +199,15 @@ void __init h720x_init_irq (void)
199 199
200 /* Initialize global IRQ's, fast path */ 200 /* Initialize global IRQ's, fast path */
201 for (irq = 0; irq < NR_GLBL_IRQS; irq++) { 201 for (irq = 0; irq < NR_GLBL_IRQS; irq++) {
202 irq_set_chip(irq, &h720x_global_chip); 202 irq_set_chip_and_handler(irq, &h720x_global_chip,
203 irq_set_handler(irq, handle_level_irq); 203 handle_level_irq);
204 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 204 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
205 } 205 }
206 206
207 /* Initialize multiplexed IRQ's, slow path */ 207 /* Initialize multiplexed IRQ's, slow path */
208 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { 208 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) {
209 irq_set_chip(irq, &h720x_gpio_chip); 209 irq_set_chip_and_handler(irq, &h720x_gpio_chip,
210 irq_set_handler(irq, handle_edge_irq); 210 handle_edge_irq);
211 set_irq_flags(irq, IRQF_VALID ); 211 set_irq_flags(irq, IRQF_VALID );
212 } 212 }
213 irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); 213 irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
@@ -217,8 +217,8 @@ void __init h720x_init_irq (void)
217 217
218#ifdef CONFIG_CPU_H7202 218#ifdef CONFIG_CPU_H7202
219 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { 219 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) {
220 irq_set_chip(irq, &h720x_gpio_chip); 220 irq_set_chip_and_handler(irq, &h720x_gpio_chip,
221 irq_set_handler(irq, handle_edge_irq); 221 handle_edge_irq);
222 set_irq_flags(irq, IRQF_VALID ); 222 set_irq_flags(irq, IRQF_VALID );
223 } 223 }
224 irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); 224 irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);