Initial blind fixup for arm for irq changes

Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 12 insertions, 17 deletions

diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index c096b4569308..4719229a1a78 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -101,14 +101,14 @@ static void inline unmask_gpio_irq(u32 irq)
 
 static void
 h720x_gpio_handler(unsigned int mask, unsigned int irq,
-                 struct irqdesc *desc, struct pt_regs *regs)
+                 struct irqdesc *desc)
 {
         IRQDBG("%s irq: %d\n",__FUNCTION__,irq);
         desc = irq_desc + irq;
         while (mask) {
                 if (mask & 1) {
                         IRQDBG("handling irq %d\n", irq);
-                        desc_handle_irq(irq, desc, regs);
+                        desc_handle_irq(irq, desc);
                 }
                 irq++;
                 desc++;
@@ -117,63 +117,58 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq,
 }
 
 static void
-h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
-                        struct pt_regs *regs)
+h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 {
         unsigned int mask, irq;
 
         mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT);
         irq = IRQ_CHAINED_GPIOA(0);
         IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
-        h720x_gpio_handler(mask, irq, desc, regs);
+        h720x_gpio_handler(mask, irq, desc);
 }
 
 static void
-h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
-                        struct pt_regs *regs)
+h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 {
         unsigned int mask, irq;
         mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT);
         irq = IRQ_CHAINED_GPIOB(0);
         IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
-        h720x_gpio_handler(mask, irq, desc, regs);
+        h720x_gpio_handler(mask, irq, desc);
 }
 
 static void
-h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
-                        struct pt_regs *regs)
+h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 {
         unsigned int mask, irq;
 
         mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT);
         irq = IRQ_CHAINED_GPIOC(0);
         IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
-        h720x_gpio_handler(mask, irq, desc, regs);
+        h720x_gpio_handler(mask, irq, desc);
 }
 
 static void
-h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
-                        struct pt_regs *regs)
+h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 {
         unsigned int mask, irq;
 
         mask = CPU_REG(GPIO_D_VIRT,GPIO_STAT);
         irq = IRQ_CHAINED_GPIOD(0);
         IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
-        h720x_gpio_handler(mask, irq, desc, regs);
+        h720x_gpio_handler(mask, irq, desc);
 }
 
 #ifdef CONFIG_CPU_H7202
 static void
-h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
-                        struct pt_regs *regs)
+h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 {
         unsigned int mask, irq;
 
         mask = CPU_REG(GPIO_E_VIRT,GPIO_STAT);
         irq = IRQ_CHAINED_GPIOE(0);
         IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
-        h720x_gpio_handler(mask, irq, desc, regs);
+        h720x_gpio_handler(mask, irq, desc);
 }
 #endif