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authorLennert Buytenhek <buytenh@wantstofly.org>2010-11-29 04:30:40 -0500
committerLennert Buytenhek <buytenh@wantstofly.org>2011-01-13 11:18:31 -0500
commit413802b6c8114972d5a1520412e6241326882273 (patch)
tree3b7f07eee97a6e4b1f16f878becfb656f1b86eb2 /arch/arm/mach-gemini/gpio.c
parentdc2caf6c691c30867fb9a725ab15f60f392c429a (diff)
ARM: gemini: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Diffstat (limited to 'arch/arm/mach-gemini/gpio.c')
-rw-r--r--arch/arm/mach-gemini/gpio.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index fe3bd5ac8b10..fa3d333f21e1 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -54,33 +54,33 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index,
54 __raw_writel(reg, base + GPIO_INT_EN); 54 __raw_writel(reg, base + GPIO_INT_EN);
55} 55}
56 56
57static void gpio_ack_irq(unsigned int irq) 57static void gpio_ack_irq(struct irq_data *d)
58{ 58{
59 unsigned int gpio = irq_to_gpio(irq); 59 unsigned int gpio = irq_to_gpio(d->irq);
60 unsigned int base = GPIO_BASE(gpio / 32); 60 unsigned int base = GPIO_BASE(gpio / 32);
61 61
62 __raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR); 62 __raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR);
63} 63}
64 64
65static void gpio_mask_irq(unsigned int irq) 65static void gpio_mask_irq(struct irq_data *d)
66{ 66{
67 unsigned int gpio = irq_to_gpio(irq); 67 unsigned int gpio = irq_to_gpio(d->irq);
68 unsigned int base = GPIO_BASE(gpio / 32); 68 unsigned int base = GPIO_BASE(gpio / 32);
69 69
70 _set_gpio_irqenable(base, gpio % 32, 0); 70 _set_gpio_irqenable(base, gpio % 32, 0);
71} 71}
72 72
73static void gpio_unmask_irq(unsigned int irq) 73static void gpio_unmask_irq(struct irq_data *d)
74{ 74{
75 unsigned int gpio = irq_to_gpio(irq); 75 unsigned int gpio = irq_to_gpio(d->irq);
76 unsigned int base = GPIO_BASE(gpio / 32); 76 unsigned int base = GPIO_BASE(gpio / 32);
77 77
78 _set_gpio_irqenable(base, gpio % 32, 1); 78 _set_gpio_irqenable(base, gpio % 32, 1);
79} 79}
80 80
81static int gpio_set_irq_type(unsigned int irq, unsigned int type) 81static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
82{ 82{
83 unsigned int gpio = irq_to_gpio(irq); 83 unsigned int gpio = irq_to_gpio(d->irq);
84 unsigned int gpio_mask = 1 << (gpio % 32); 84 unsigned int gpio_mask = 1 << (gpio % 32);
85 unsigned int base = GPIO_BASE(gpio / 32); 85 unsigned int base = GPIO_BASE(gpio / 32);
86 unsigned int reg_both, reg_level, reg_type; 86 unsigned int reg_both, reg_level, reg_type;
@@ -120,7 +120,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
120 __raw_writel(reg_level, base + GPIO_INT_LEVEL); 120 __raw_writel(reg_level, base + GPIO_INT_LEVEL);
121 __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE); 121 __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
122 122
123 gpio_ack_irq(irq); 123 gpio_ack_irq(d->irq);
124 124
125 return 0; 125 return 0;
126} 126}
@@ -146,10 +146,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
146 146
147static struct irq_chip gpio_irq_chip = { 147static struct irq_chip gpio_irq_chip = {
148 .name = "GPIO", 148 .name = "GPIO",
149 .ack = gpio_ack_irq, 149 .irq_ack = gpio_ack_irq,
150 .mask = gpio_mask_irq, 150 .irq_mask = gpio_mask_irq,
151 .unmask = gpio_unmask_irq, 151 .irq_unmask = gpio_unmask_irq,
152 .set_type = gpio_set_irq_type, 152 .irq_set_type = gpio_set_irq_type,
153}; 153};
154 154
155static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, 155static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,