diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-12-06 03:25:16 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-12-13 04:12:07 -0500 |
commit | 70d13e083c8589dd3edc2313777655da39cb3568 (patch) | |
tree | 41478a4699b3cbc8c5598ccc1863ea058948741e /arch/arm/mach-footbridge/netwinder-hw.c | |
parent | 7ec80ddf0455ff3854a5ca524952d91b5eb676b2 (diff) |
[ARM] netwinder: clean up GPIO naming
Netwinder was using gpio_xxx names which could clash with the GPIO
layer. Add a 'nw_' prefix to ensure that these remain separate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-footbridge/netwinder-hw.c')
-rw-r--r-- | arch/arm/mach-footbridge/netwinder-hw.c | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index 00b0ddcac283..ac7ffa6fc413 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c | |||
@@ -11,6 +11,7 @@ | |||
11 | #include <linux/delay.h> | 11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
14 | #include <linux/spinlock.h> | ||
14 | 15 | ||
15 | #include <asm/hardware/dec21285.h> | 16 | #include <asm/hardware/dec21285.h> |
16 | #include <asm/leds.h> | 17 | #include <asm/leds.h> |
@@ -67,13 +68,14 @@ static inline void wb977_ww(int reg, int val) | |||
67 | /* | 68 | /* |
68 | * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE | 69 | * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE |
69 | */ | 70 | */ |
70 | DEFINE_SPINLOCK(gpio_lock); | 71 | DEFINE_SPINLOCK(nw_gpio_lock); |
72 | EXPORT_SYMBOL(nw_gpio_lock); | ||
71 | 73 | ||
72 | static unsigned int current_gpio_op; | 74 | static unsigned int current_gpio_op; |
73 | static unsigned int current_gpio_io; | 75 | static unsigned int current_gpio_io; |
74 | static unsigned int current_cpld; | 76 | static unsigned int current_cpld; |
75 | 77 | ||
76 | void gpio_modify_op(int mask, int set) | 78 | void nw_gpio_modify_op(unsigned int mask, unsigned int set) |
77 | { | 79 | { |
78 | unsigned int new_gpio, changed; | 80 | unsigned int new_gpio, changed; |
79 | 81 | ||
@@ -86,6 +88,7 @@ void gpio_modify_op(int mask, int set) | |||
86 | if (changed & 0xff00) | 88 | if (changed & 0xff00) |
87 | outb(new_gpio >> 8, GP2_IO_BASE); | 89 | outb(new_gpio >> 8, GP2_IO_BASE); |
88 | } | 90 | } |
91 | EXPORT_SYMBOL(nw_gpio_modify_op); | ||
89 | 92 | ||
90 | static inline void __gpio_modify_io(int mask, int in) | 93 | static inline void __gpio_modify_io(int mask, int in) |
91 | { | 94 | { |
@@ -118,7 +121,7 @@ static inline void __gpio_modify_io(int mask, int in) | |||
118 | } | 121 | } |
119 | } | 122 | } |
120 | 123 | ||
121 | void gpio_modify_io(int mask, int in) | 124 | void nw_gpio_modify_io(unsigned int mask, unsigned int in) |
122 | { | 125 | { |
123 | /* Open up the SuperIO chip */ | 126 | /* Open up the SuperIO chip */ |
124 | wb977_open(); | 127 | wb977_open(); |
@@ -128,11 +131,13 @@ void gpio_modify_io(int mask, int in) | |||
128 | /* Close up the EFER gate */ | 131 | /* Close up the EFER gate */ |
129 | wb977_close(); | 132 | wb977_close(); |
130 | } | 133 | } |
134 | EXPORT_SYMBOL(nw_gpio_modify_io); | ||
131 | 135 | ||
132 | int gpio_read(void) | 136 | unsigned int nw_gpio_read(void) |
133 | { | 137 | { |
134 | return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8; | 138 | return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8; |
135 | } | 139 | } |
140 | EXPORT_SYMBOL(nw_gpio_read); | ||
136 | 141 | ||
137 | /* | 142 | /* |
138 | * Initialise the Winbond W83977F global registers | 143 | * Initialise the Winbond W83977F global registers |
@@ -322,9 +327,9 @@ static inline void wb977_init_gpio(void) | |||
322 | /* | 327 | /* |
323 | * Set Group1/Group2 outputs | 328 | * Set Group1/Group2 outputs |
324 | */ | 329 | */ |
325 | spin_lock_irqsave(&gpio_lock, flags); | 330 | spin_lock_irqsave(&nw_gpio_lock, flags); |
326 | gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); | 331 | nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); |
327 | spin_unlock_irqrestore(&gpio_lock, flags); | 332 | spin_unlock_irqrestore(&nw_gpio_lock, flags); |
328 | } | 333 | } |
329 | 334 | ||
330 | /* | 335 | /* |
@@ -359,34 +364,35 @@ static void __init wb977_init(void) | |||
359 | wb977_close(); | 364 | wb977_close(); |
360 | } | 365 | } |
361 | 366 | ||
362 | void cpld_modify(int mask, int set) | 367 | void nw_cpld_modify(unsigned int mask, unsigned int set) |
363 | { | 368 | { |
364 | int msk; | 369 | int msk; |
365 | 370 | ||
366 | current_cpld = (current_cpld & ~mask) | set; | 371 | current_cpld = (current_cpld & ~mask) | set; |
367 | 372 | ||
368 | gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0); | 373 | nw_gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0); |
369 | gpio_modify_op(GPIO_IOLOAD, 0); | 374 | nw_gpio_modify_op(GPIO_IOLOAD, 0); |
370 | 375 | ||
371 | for (msk = 8; msk; msk >>= 1) { | 376 | for (msk = 8; msk; msk >>= 1) { |
372 | int bit = current_cpld & msk; | 377 | int bit = current_cpld & msk; |
373 | 378 | ||
374 | gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0); | 379 | nw_gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0); |
375 | gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK); | 380 | nw_gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK); |
376 | } | 381 | } |
377 | 382 | ||
378 | gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0); | 383 | nw_gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0); |
379 | gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK); | 384 | nw_gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK); |
380 | gpio_modify_op(GPIO_IOLOAD, 0); | 385 | nw_gpio_modify_op(GPIO_IOLOAD, 0); |
381 | } | 386 | } |
387 | EXPORT_SYMBOL(nw_cpld_modify); | ||
382 | 388 | ||
383 | static void __init cpld_init(void) | 389 | static void __init cpld_init(void) |
384 | { | 390 | { |
385 | unsigned long flags; | 391 | unsigned long flags; |
386 | 392 | ||
387 | spin_lock_irqsave(&gpio_lock, flags); | 393 | spin_lock_irqsave(&nw_gpio_lock, flags); |
388 | cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE); | 394 | nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE); |
389 | spin_unlock_irqrestore(&gpio_lock, flags); | 395 | spin_unlock_irqrestore(&nw_gpio_lock, flags); |
390 | } | 396 | } |
391 | 397 | ||
392 | static unsigned char rwa_unlock[] __initdata = | 398 | static unsigned char rwa_unlock[] __initdata = |
@@ -596,12 +602,6 @@ static void __init rwa010_init(void) | |||
596 | rwa010_soundblaster_reset(); | 602 | rwa010_soundblaster_reset(); |
597 | } | 603 | } |
598 | 604 | ||
599 | EXPORT_SYMBOL(gpio_lock); | ||
600 | EXPORT_SYMBOL(gpio_modify_op); | ||
601 | EXPORT_SYMBOL(gpio_modify_io); | ||
602 | EXPORT_SYMBOL(cpld_modify); | ||
603 | EXPORT_SYMBOL(gpio_read); | ||
604 | |||
605 | /* | 605 | /* |
606 | * Initialise any other hardware after we've got the PCI bus | 606 | * Initialise any other hardware after we've got the PCI bus |
607 | * initialised. We may need the PCI bus to talk to this other | 607 | * initialised. We may need the PCI bus to talk to this other |
@@ -616,9 +616,9 @@ static int __init nw_hw_init(void) | |||
616 | cpld_init(); | 616 | cpld_init(); |
617 | rwa010_init(); | 617 | rwa010_init(); |
618 | 618 | ||
619 | spin_lock_irqsave(&gpio_lock, flags); | 619 | spin_lock_irqsave(&nw_gpio_lock, flags); |
620 | gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS); | 620 | nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS); |
621 | spin_unlock_irqrestore(&gpio_lock, flags); | 621 | spin_unlock_irqrestore(&nw_gpio_lock, flags); |
622 | } | 622 | } |
623 | return 0; | 623 | return 0; |
624 | } | 624 | } |